component

DG419BDY-T1-E3

Public Made by Adom

by adom

Vishay Intertech Analog Switches, Multiplexers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentinterfacedg419bdy-t1-e3factory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray
viewers dg419bdy-t1-e3: viewers · Ray
dg419bdy-t1-e3-etched.glb Publish 0.1.0 · Ray
dg419bdy-t1-e3-etched.step dg419bdy-t1-e3: factory component page (tier=lcsc) · Ray
dg419bdy-t1-e3-hero.glb dg419bdy-t1-e3: hero GLB from the etched model (keeps the MPN mark) · Ray
dg419bdy-t1-e3-hero.overlay.json Publish 0.1.0 · Ray
dg419bdy-t1-e3.glb Publish 0.1.0 · Ray
dg419bdy-t1-e3.kicad_mod Publish 0.1.0 · Ray
dg419bdy-t1-e3.kicad_sym Publish 0.1.0 · Ray
dg419bdy-t1-e3.lbr Publish 0.1.0 · Ray
dg419bdy-t1-e3.step Publish 0.1.0 · Ray
package.json Publish 0.1.0 · Ray
page.json Set visibility: public · Ray
README.md Publish 0.1.0 · Ray

DG419BDY-T1-E3

Vishay Intertech · Analog Switches, Multiplexers · SOIC-8

DG419BDY-T1-E3 from Vishay Intertech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 D passive Drain terminal of the SPDT switch; signals on D beyond V+ or V- are clamped by internal diodes, so forward diode current must be limited to the maximum current ratings.
2 S1 passive Source terminal of switch SW1, which is ON at logic 0 and OFF at logic 1 per the DG419B truth table; signals beyond V+ or V- are clamped by internal diodes.
3 V- power_in Negative power supply; absolute maximum rating is -20 V, and the analog signal range is tested at -15 V.
4 GND power_in Ground reference terminal; the absolute maximum rating for GND is listed as 25 with no unit printed.
5 IN input Digital logic input controlling the switches, TTL and CMOS compatible with logic 0 at or below 0.8 V and logic 1 at or above 2.4 V; applied voltage must stay within (V-) - 2 V to (V+) + 2 V or 30 mA, whichever occurs first.
6 VL power_in Logic supply input that must stay between (GND - 0.3) V and (V+) + 0.3 V; characterized at 5 V.
7 V+ power_in Positive power supply; absolute maximum rating is 20 V, and the datasheet characterizes the part at 15 V.
8 S2 passive Source terminal of switch SW2, which is OFF at logic 0 and ON at logic 1 per the DG419B truth table; signals beyond V+ or V- are clamped by internal diodes.

Key specifications

Parameter Value
Manufacturer Vishay Intertech
Package SOIC-8
Category Interface
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Analog Signal Range VANALOG -15 15 V Full (D suffix: -40 °C to 85 °C); V+ = 15 V, V- = -15 V 3
Drain-Source On-Resistance RDS(on) 15 25 Ω Room (25 °C); IS = -10 mA, VD = ±12.5 V, V+ = 13.5 V, V- = -13.5 V 3
Drain-Source On-Resistance RDS(on) 29 Ω Full (D suffix: -40 °C to 85 °C); IS = -10 mA, VD = ±12.5 V, V+ = 13.5 V, V- = -13.5 V 3
Switch Off Leakage Current IS(off) -0.25 -0.1 0.25 nA Room (25 °C); V+ = 16.5 V, V- = -16.5 V, VD = ±15.5 V, VS = ±15.5 V 3
Switch Off Leakage Current IS(off) -5 5 nA Full (D suffix: -40 °C to 85 °C); V+ = 16.5 V, V- = -16.5 V, VD = ±15.5 V, VS = ±15.5 V 3
Off Leakage Current (DG419B) ID(off) -0.75 -0.1 0.75 nA Room (25 °C); V+ = 16.5 V, V- = -16.5 V, VD = ±15.5 V, VS = ±15.5 V 3
Off Leakage Current (DG419B) ID(off) -12 12 nA Full (D suffix: -40 °C to 85 °C); V+ = 16.5 V, V- = -16.5 V, VD = ±15.5 V, VS = ±15.5 V 3
Channel On Leakage Current (DG419B) ID(on) -0.75 -0.4 0.75 nA Room (25 °C); V+ = 16.5 V, V- = -16.5 V, VS = VD = ±15.5 V 3
Channel On Leakage Current (DG419B) ID(on) -12 12 nA Full (D suffix: -40 °C to 85 °C); V+ = 16.5 V, V- = -16.5 V, VS = VD = ±15.5 V 3
Input Current, VIN Low IIL -0.5 0.5 µA Full (D suffix: -40 °C to 85 °C) 3
Input Current, VIN High IIH -0.5 0.5 µA Full (D suffix: -40 °C to 85 °C) 3
Transition Time (DG419B) tTRANS 60 87 ns Room (25 °C); RL = 300 Ω, CL = 35 pF, VS1 = ±10 V, VS2 = ±10 V 3
Transition Time (DG419B) tTRANS 93 ns Full (D suffix: -40 °C to 85 °C); RL = 300 Ω, CL = 35 pF, VS1 = ±10 V, VS2 = ±10 V 3
Break-Before-Make Time Delay (DG419B) tD 3 16 ns Room (25 °C); RL = 300 Ω, CL = 35 pF, VS1 = VS2 = ±10 V 3
Positive Supply Current I+ 0.001 1 µA Room (25 °C); V+ = 16.5 V, V- = -16.5 V, VIN = 0 or 5 V 4
Positive Supply Current I+ 5 µA Full (D suffix: -40 °C to 85 °C); V+ = 16.5 V, V- = -16.5 V, VIN = 0 or 5 V 4
Negative Supply Current I- -1 -0.001 µA Room (25 °C); V+ = 16.5 V, V- = -16.5 V, VIN = 0 or 5 V 4
Negative Supply Current I- -5 µA Full (D suffix: -40 °C to 85 °C); V+ = 16.5 V, V- = -16.5 V, VIN = 0 or 5 V 4
Logic Supply Current IL 0.001 1 µA Room (25 °C); V+ = 16.5 V, V- = -16.5 V, VIN = 0 or 5 V 4
Logic Supply Current IL 5 µA Full (D suffix: -40 °C to 85 °C); V+ = 16.5 V, V- = -16.5 V, VIN = 0 or 5 V 4
Ground Current IGND -1 -0.001 µA Room (25 °C); V+ = 16.5 V, V- = -16.5 V, VIN = 0 or 5 V 4
Ground Current IGND -5 µA Full (D suffix: -40 °C to 85 °C); V+ = 16.5 V, V- = -16.5 V, VIN = 0 or 5 V 4
Positive supply voltage (absolute maximum) V+ 20 V 2
Negative supply voltage (absolute maximum) V- -20 V 2
GND (absolute maximum) GND 25 V 2
Current, any terminal (continuous) 30 mA Continuous, any terminal 2
Current S or D (pulsed) 100 mA Pulsed at 1 ms, 10 % duty cycle 2
Storage Temperature -65 150 °C 2
Power Dissipation (8-Pin Narrow SOIC) 400 mW Derate 5.3 mW/°C above 75 °C (note c) 2

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing Pc 8-Pin Plastic MiniDIPc 400 2

CAD (KiCad official)

  • Symbol: DG419BDY-T1-E3
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: dg419bdy-t1-e3-etched.step / dg419bdy-t1-e3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dg419bdy-t1-e3.step / dg419bdy-t1-e3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Vishay Intertech datasheet (14 pp, sha256 c4b2c2dcb1fc0233, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF