main
Ray dg412dq-t1-e3: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) 466391a
{
  "schema_version": 1,
  "type": "component",
  "slug": "dg412dq-t1-e3",
  "title": "DG412DQ-T1-E3",
  "brief": "Vishay Analog Switches / Multiplexers, TSSOP-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "comm-uart",
    "dg412dq-t1-e3"
  ],
  "component": {
    "mpn": "DG412DQ-T1-E3",
    "manufacturer": "Vishay",
    "package": "TSSOP-16",
    "pin_count": 16,
    "category": "Comm/UART",
    "subcategory": "Analog Switches / Multiplexers",
    "datasheet": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2108070630_Vishay-Intertech-DG412DQ-T1-E3_C2651920.pdf",
    "parts": {
      "symbol": "dg412dq-t1-e3.kicad_sym",
      "footprint": "dg412dq-t1-e3.kicad_mod",
      "model_3d": "dg412dq-t1-e3-etched.glb",
      "model_3d_plain": "dg412dq-t1-e3.glb",
      "model_3d_step": "dg412dq-t1-e3-etched.step",
      "model_3d_step_plain": "dg412dq-t1-e3.step",
      "lbr": "dg412dq-t1-e3.lbr"
    },
    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "IN1",
        "type": "input",
        "description": "TTL/CMOS logic control input for switch 1. Logic '0' ≤ 0.8 V (SW1 OFF), logic '1' ≥ 2.4 V (SW1 ON). Input current ±0.5 µA max."
      },
      {
        "number": "2",
        "name": "D1",
        "type": "passive",
        "description": "Analog drain terminal of switch 1. Bidirectional analog signal terminal, ±15 V analog range, RDS(on) ≈ 25 Ω. Conducts equally well in both directions when ON."
      },
      {
        "number": "3",
        "name": "S1",
        "type": "passive",
        "description": "Analog source terminal of switch 1. Bidirectional analog signal terminal, ±15 V analog range. Continuous current 30 mA max, peak 100 mA (1 ms, 10% DC)."
      },
      {
        "number": "4",
        "name": "V-",
        "type": "power_in",
        "description": "Negative analog supply. Typically -15 V; V+ to V- must not exceed 44 V. Sets negative rail of analog signal range."
      },
      {
        "number": "5",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference. GND to V- limited to 25 V max."
      },
      {
        "number": "6",
        "name": "S4",
        "type": "passive",
        "description": "Analog source terminal of switch 4. Bidirectional analog signal terminal, ±15 V analog range."
      },
      {
        "number": "7",
        "name": "D4",
        "type": "passive",
        "description": "Analog drain terminal of switch 4. Bidirectional analog signal terminal, ±15 V analog range, RDS(on) ≈ 25 Ω."
      },
      {
        "number": "8",
        "name": "IN4",
        "type": "input",
        "description": "TTL/CMOS logic control input for switch 4. Logic '0' ≤ 0.8 V (SW4 OFF), logic '1' ≥ 2.4 V (SW4 ON)."
      },
      {
        "number": "9",
        "name": "IN3",
        "type": "input",
        "description": "TTL/CMOS logic control input for switch 3. Logic '0' ≤ 0.8 V (SW3 OFF), logic '1' ≥ 2.4 V (SW3 ON)."
      },
      {
        "number": "10",
        "name": "D3",
        "type": "passive",
        "description": "Analog drain terminal of switch 3. Bidirectional analog signal terminal, ±15 V analog range, RDS(on) ≈ 25 Ω."
      },
      {
        "number": "11",
        "name": "S3",
        "type": "passive",
        "description": "Analog source terminal of switch 3. Bidirectional analog signal terminal, ±15 V analog range."
      },
      {
        "number": "12",
        "name": "VL",
        "type": "power_in",
        "description": "Logic supply voltage (typically +5 V). Powers the TTL/CMOS-compatible digital control interface. Range (GND - 0.3) to (V+) + 0.3."
      },
      {
        "number": "13",
        "name": "V+",
        "type": "power_in",
        "description": "Positive analog supply. Typically +15 V; V+ to V- must not exceed 44 V. Sets positive rail of analog signal range."
      },
      {
        "number": "14",
        "name": "S2",
        "type": "passive",
        "description": "Analog source terminal of switch 2. Bidirectional analog signal terminal, ±15 V analog range."
      },
      {
        "number": "15",
        "name": "D2",
        "type": "passive",
        "description": "Analog drain terminal of switch 2. Bidirectional analog signal terminal, ±15 V analog range, RDS(on) ≈ 25 Ω."
      },
      {
        "number": "16",
        "name": "IN2",
        "type": "input",
        "description": "TTL/CMOS logic control input for switch 2. Logic '0' ≤ 0.8 V (SW2 OFF), logic '1' ≥ 2.4 V (SW2 ON)."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2108070630_Vishay-Intertech-DG412DQ-T1-E3_C2651920.pdf",
        "pages": 14,
        "sha256": "7d2688acee1bfd79",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "dg412dq-t1-e3.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          5,
          1.1
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "6ad5e98224d02a427d9a6b929a28dbc158b9925fba5adec12db05079f1016948",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "dg412dq-t1-e3-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          5,
          1.1
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "47ceb5a46950e77a6e902eaf6f128af91736c1600ce2a04f08ec441d19fc853b",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Vishay",
      "Package": "TSSOP-16",
      "Category": "Comm/UART",
      "Pins": "16"
    }
  },
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "dg412dq-t1-e3"
  ],
  "discovery_pitch": "DG412DQ-T1-E3 (Vishay) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "dg412dq-t1-e3.kicad_sym",
    "dg412dq-t1-e3.kicad_mod",
    "dg412dq-t1-e3.glb",
    "dg412dq-t1-e3.step",
    "dg412dq-t1-e3.lbr",
    "docs/hero.png",
    "docs/dg412dq-t1-e3-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "dg412dq-t1-e3-etched.step"
  ],
  "visibility": {
    "public": true
  },
  "variants": [
    {
      "mpn": "DG412DQ-T1-E3DQ-E3",
      "kind": "packaging"
    },
    {
      "mpn": "DG412DQ-T1-E3",
      "kind": "packaging"
    },
    {
      "mpn": "DG412DQ-T1-E3DJ",
      "kind": "packaging"
    },
    {
      "mpn": "DG412DQ-T1-E3DJ-E3",
      "kind": "packaging"
    },
    {
      "mpn": "DG412DQ-T1-E3DY",
      "kind": "packaging"
    },
    {
      "mpn": "DG412DQ-T1-E3DY-E3",
      "kind": "packaging"
    },
    {
      "mpn": "DG412DQ-T1-E3DY-T1",
      "kind": "packaging"
    },
    {
      "mpn": "DG412DQ-T1-E3DY-T1-E3",
      "kind": "packaging"
    }
  ],
  "updated_at": "2026-09-24T19:44:29.855Z"
}