component

DG408DQ-T1-E3

Public Made by Adom

by adom

Vishay Analog Switches / Multiplexers, TSSOP-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

componentcomm-uartdg408dq-t1-e3
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs dg408dq-t1-e3: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
dg408dq-t1-e3-etched.fit.json dg408dq-t1-e3: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
dg408dq-t1-e3-etched.glb dg408dq-t1-e3: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
dg408dq-t1-e3-etched.step dg408dq-t1-e3: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
dg408dq-t1-e3.glb Publish 0.1.0 · Ray 1mo ago
dg408dq-t1-e3.kicad_mod Publish 0.1.0 · Ray 1mo ago
dg408dq-t1-e3.kicad_sym Publish 0.1.0 · Ray 1mo ago
dg408dq-t1-e3.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect and oval pad as a SQUARE EAGLE smd; this carries the real pad shape across (0 -> 16 rounded pads) and stops dropping geometry drawn on KiCad User.N layers. Attributes, connects, pads and the pin-1 marker are gated against decreasing and are unchanged. · Ray 1mo ago
dg408dq-t1-e3.step Publish 0.1.0 · Ray 1mo ago
package.json Publish 0.2.0 · Ray 1mo ago
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
page.json Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout") · Ray 11d ago
README.md dg408dq-t1-e3: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 17d ago

DG408DQ-T1-E3

Vishay · Analog Switches / Multiplexers · TSSOP-16

DG408DQ-T1-E3 from Vishay, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A0 input Address bit 0 (LSB) of the 3-bit channel-select bus. TTL-compatible: VIL ≤ 0.8 V, VIH ≥ 2.4 V.
2 EN input Active-high enable. EN = 0 turns all switches OFF; EN = 1 enables the channel selected by A0/A1/A2. TTL-compatible.
3 V- power_in Negative analog supply. Dual-supply range ±5 V to ±20 V, or tie to GND for single-supply +5 V to +36 V operation. V+ to V- ≤ 44 V absolute max.
4 S1 passive Analog switch source input, channel 1. Selected when A2A1A0 = 000 and EN = 1. Signal range V- to V+.
5 S2 passive Analog switch source input, channel 2. Selected when A2A1A0 = 001 and EN = 1.
6 S3 passive Analog switch source input, channel 3. Selected when A2A1A0 = 010 and EN = 1.
7 S4 passive Analog switch source input, channel 4. Selected when A2A1A0 = 011 and EN = 1.
8 D passive Common analog drain (multiplexer output). Bidirectional; conducts equally in both directions. RDS(on) ≈ 100 Ω, peak pulsed current 100 mA (1 ms, 10 % duty).
9 S8 passive Analog switch source input, channel 8. Selected when A2A1A0 = 111 and EN = 1.
10 S7 passive Analog switch source input, channel 7. Selected when A2A1A0 = 110 and EN = 1.
11 S6 passive Analog switch source input, channel 6. Selected when A2A1A0 = 101 and EN = 1.
12 S5 passive Analog switch source input, channel 5. Selected when A2A1A0 = 100 and EN = 1.
13 V+ power_in Positive analog supply. Dual-supply ±5 V to ±20 V, or single-supply +5 V to +36 V referenced to GND (V- tied to GND). Typical I+ = 10 µA.
14 GND power_in Digital/logic ground reference. GND-to-V- absolute max -25 V.
15 A2 input Address bit 2 (MSB) of the 3-bit channel-select bus. TTL-compatible.
16 A1 input Address bit 1 of the 3-bit channel-select bus. TTL-compatible.

Key specifications

Parameter Value
Manufacturer Vishay
Package TSSOP-16
Category Comm/UART
Pins 16

Ordering variants

Same part, different packaging or reel option.

  • DG408DQ-T1-E3DQ-E3
  • DG408DQ-T1-E3
  • DG408DQ-T1-E3DY
  • DG408DQ-T1-E3DY-E3
  • DG408DQ-T1-E3DY-T1
  • DG408DQ-T1-E3DY-T1-E3
  • DG408DQ-T1-E3DJ
  • DG408DQ-T1-E3DJ-E3

CAD (KiCad official)

  • Symbol: DG408DQ-T1-E3
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: dg408dq-t1-e3-etched.step / dg408dq-t1-e3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dg408dq-t1-e3.step / dg408dq-t1-e3.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
dg408dq-t1-e3.step 205 KB You want the bare part, or you mark your own boards.
dg408dq-t1-e3-etched.step 2.8 MB You want the part with DG408DQ-T1-E3 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 690 faces against 255 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Vishay datasheet (17 pp, sha256 950673efec0223bf, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF