main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs dg211bdq-t1-e3: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers dg211bdq-t1-e3: viewers · Ray
dg211bdq-t1-e3-etched.fit.json dg211bdq-t1-e3: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
dg211bdq-t1-e3-etched.glb dg211bdq-t1-e3: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
dg211bdq-t1-e3-etched.step dg211bdq-t1-e3: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
dg211bdq-t1-e3.glb Publish 0.1.0 · Ray
dg211bdq-t1-e3.kicad_mod Publish 0.1.0 · Ray
dg211bdq-t1-e3.kicad_sym Publish 0.1.0 · Ray
dg211bdq-t1-e3.lbr Publish 0.1.0 · Ray
dg211bdq-t1-e3.step Publish 0.1.0 · Ray
package.json Publish 0.2.0 · Ray
page.json dg211bdq-t1-e3: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md dg211bdq-t1-e3: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray

DG211BDQ-T1-E3

Vishay · Analog Switches, Multiplexers · TSSOP-16

DG211BDQ-T1-E3 from Vishay, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN1 input Digital logic control input for switch 1. TTL/CMOS compatible: VINH ≥ 2.4 V (logic high), VINL ≤ 0.8 V (logic low). For DG211B, logic 0 = switch ON, logic 1 = switch OFF (normally closed).
2 D1 passive Drain terminal of analog switch 1. Bidirectional analog signal path to S1 when the switch is ON. RDS(on) ≈ 50 Ω typ; analog signal range ±15 V (±15 V supplies). Continuous current rating 30 mA.
3 S1 passive Source terminal of analog switch 1. Bidirectional analog signal path to D1 when the switch is ON. True bi-directional performance; blocks to supply rails in the off condition.
4 V- power_in Negative analog supply. Typically -15 V for dual-supply operation; may be tied to GND for single-supply operation (up to +25 V on V+). Absolute max V+ to V- = 44 V.
5 GND power_in Digital ground / reference for logic inputs. Absolute maximum voltage 25 V referenced to V-.
6 S4 passive Source terminal of analog switch 4. Bidirectional analog signal path to D4 when the switch is ON.
7 D4 passive Drain terminal of analog switch 4. Bidirectional analog signal path to S4 when the switch is ON. RDS(on) ≈ 50 Ω typ.
8 IN4 input Digital logic control input for switch 4. TTL/CMOS compatible. DG211B: logic 0 = ON, logic 1 = OFF (normally closed).
9 IN3 input Digital logic control input for switch 3. TTL/CMOS compatible. DG211B: logic 0 = ON, logic 1 = OFF (normally closed).
10 D3 passive Drain terminal of analog switch 3. Bidirectional analog signal path to S3 when the switch is ON.
11 S3 passive Source terminal of analog switch 3. Bidirectional analog signal path to D3 when the switch is ON.
12 VL power_in Logic supply. Typically +5 V; sets the logic threshold reference for the digital control inputs (TTL/CMOS compatible).
13 V+ power_in Positive analog supply. Typically +15 V for dual-supply operation; up to +25 V for single-supply operation. Sets positive analog signal range and clamp limits.
14 S2 passive Source terminal of analog switch 2. Bidirectional analog signal path to D2 when the switch is ON.
15 D2 passive Drain terminal of analog switch 2. Bidirectional analog signal path to S2 when the switch is ON.
16 IN2 input Digital logic control input for switch 2. TTL/CMOS compatible. DG211B: logic 0 = ON, logic 1 = OFF (normally closed).

Key specifications

Parameter Value
Manufacturer Vishay
Package TSSOP-16
Category Interface
Pins 16

Ordering variants

Same part, different packaging or reel option.

  • DG211BDQ-T1-E3
  • DG211BDQ-T1-E3DQ-E3
  • DG211BDQ-T1-E3DY
  • DG211BDQ-T1-E3DY-T1
  • DG211BDQ-T1-E3DY-E3
  • DG211BDQ-T1-E3DY-T1-E3
  • DG211BDQ-T1-E3DJ
  • DG211BDQ-T1-E3DJ-E3

CAD (KiCad official)

  • Symbol: DG211BDQ-T1-E3
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: dg211bdq-t1-e3-etched.step / dg211bdq-t1-e3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dg211bdq-t1-e3.step / dg211bdq-t1-e3.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
dg211bdq-t1-e3.step 205 KB You want the bare part, or you mark your own boards.
dg211bdq-t1-e3-etched.step 2.7 MB You want the part with DG211BDQ-T1-E3 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 684 faces against 255 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Vishay datasheet (14 pp, sha256 054b5a2872d31f77, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF