component

DF2S12FS

Public Made by Adom

by adom

TOSHIBA ESD And Surge Protection (TVS/ESD), SOD-923. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
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docs Publish 0.1.0 · Ray 15d ago
viewers df2s12fs: symbol repaired (D_Zener, cathode pad 1) · Ray 5d ago
df2s12fs-etched.glb Publish 0.1.0 · Ray 15d ago
df2s12fs-etched.step df2s12fs: factory component page (tier=lcsc) · Ray 15d ago
df2s12fs-hero.glb df2s12fs: hero GLB from the etched model (keeps the MPN mark) · Ray 15d ago
df2s12fs-hero.overlay.json Publish 0.1.0 · Ray 15d ago
df2s12fs.glb Publish 0.1.0 · Ray 15d ago
df2s12fs.kicad_mod Publish 0.1.0 · Ray 15d ago
df2s12fs.kicad_sym df2s12fs: symbol repaired (D_Zener, cathode pad 1) · Ray 5d ago
df2s12fs.lbr df2s12fs: symbol repaired (D_Zener, cathode pad 1) · Ray 5d ago
df2s12fs.step Publish 0.1.0 · Ray 15d ago
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README.md Publish 0.1.0 · Ray 15d ago

DF2S12FS

TOSHIBA · ESD And Surge Protection (TVS/ESD) · SOD-923

DF2S12FS from TOSHIBA, in a SOD-923. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Cathode passive Cathode terminal of the ESD protection diode in the SOD-923 package, as shown in the packaging and internal circuit diagram.
2 Anode passive Anode terminal of the ESD protection diode in the SOD-923 package, as shown in the packaging and internal circuit diagram.

Key specifications

Parameter Value
Manufacturer TOSHIBA
Package SOD-923
Category Circuit Protection
Pins 2

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Junction temperature Tj 150 °C 2
Storage temperature Tstg -55 150 °C 2
Electrostatic discharge voltage (IEC61000-4-2) (Contact) VESD -20 20 kV IEC61000-4-2 (Contact) 2
Working peak reverse voltage VRWM 9 V 2
Zener voltage (Reverse breakdown voltage) VZ 11.4 12 12.6 V IZ = 5 mA 2
Dynamic impedance ZZ 25 Ω IZ = 5 mA 2
Reverse current IR 0.05 µA VRWM = 9 V 2
Clamp voltage (reverse side) VC 18.5 V IPP = 1A (Reverse side) 2
Clamp voltage (forward side) VC 1.7 V IPP = 1A (Forward side) 2
Total capacitance Ct 15 pF VR = 0 V, f = 1 MHz 2

CAD (KiCad official)

  • Symbol: DF2S12FS
  • Footprint: Diode_SMD:D_SOD-923
  • 3D model: SOD-923 (KiCad packages3D, STEP)
  • 3D model files: df2s12fs-etched.step / df2s12fs-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); df2s12fs.step / df2s12fs.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TOSHIBA datasheet (8 pp, sha256 c530d3cd0a9cfc5e, retrieved 2026-10-26, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF