component
DF2B5M5CT
Public Made by Adomby adom
TOSHIBA ESD And Surge Protection (TVS/ESD), SOD-882. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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DF2B5M5CT
TOSHIBA · ESD And Surge Protection (TVS/ESD) · SOD-882
DF2B5M5CT from TOSHIBA, in a SOD-882. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Pin 1 | bidirectional | Used as the I/O line for ESD protection; when Pin 1 is used as I/O, Pin 2 must be connected to GND. Working peak reverse voltage VRWM is 3.3 V max. |
| 2 | Pin 2 | bidirectional | Used as the second I/O line for ESD protection; when Pin 2 is used as I/O, Pin 1 must be connected to GND. Working peak reverse voltage VRWM is 3.3 V max. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | TOSHIBA |
| Package | SOD-882 |
| Category | Circuit Protection |
| Pins | 2 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Working peak reverse voltage (recommended operating condition) | VRWM | 3.3 | V | 2 | |||
| Working peak reverse voltage | VRWM | 3.3 | V | 5 | |||
| Total capacitance | Ct | 0.3 | 0.45 | pF | VR = 0 V, f = 1 MHz | 5 | |
| First peak voltage | Vpeak | 6 | V | 5 | |||
| Reverse current | IR | 0.1 | µA | VRWM = 3.3 V | 5 | ||
| Clamp voltage | VC | 15 | V | 5 | |||
| Electrostatic discharge voltage (IEC61000-4-2) (Contact) | VESD | -20 | 20 | kV | IEC61000-4-2 (Contact) | 4 | |
| Electrostatic discharge voltage (IEC61000-4-2) (Air) | VESD | -20 | 20 | kV | IEC61000-4-2 (Air) | 4 | |
| Peak pulse power (tp = 8/20 µs) | PPK | 37 | W | tp = 8/20 µs, IEC61000-4-5 | 4 | ||
| Peak pulse current (tp = 8/20 µs) | IPP | 2.5 | A | tp = 8/20 µs, IEC61000-4-5 | 4 | ||
| Junction temperature | Tj | 150 | °C | 4 | |||
| Storage temperature | Tstg | -55 | 150 | °C | 4 |
CAD (KiCad official)
- Symbol:
DF2B5M5CT - Footprint:
Diode_SMD:D_SOD-882 - 3D model: SOD-882 (KiCad packages3D, STEP)
- 3D model files:
df2b5m5ct-etched.step/df2b5m5ct-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);df2b5m5ct.step/df2b5m5ct.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: TOSHIBA datasheet (9 pp, sha256
612adf1d25149cae, retrieved 2026-10-16, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# DF2B5M5CT
**TOSHIBA** · ESD And Surge Protection (TVS/ESD) · SOD-882
DF2B5M5CT from TOSHIBA, in a SOD-882. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Pin 1 | bidirectional | Used as the I/O line for ESD protection; when Pin 1 is used as I/O, Pin 2 must be connected to GND. Working peak reverse voltage VRWM is 3.3 V max. |
| 2 | Pin 2 | bidirectional | Used as the second I/O line for ESD protection; when Pin 2 is used as I/O, Pin 1 must be connected to GND. Working peak reverse voltage VRWM is 3.3 V max. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | TOSHIBA |
| Package | SOD-882 |
| Category | Circuit Protection |
| Pins | 2 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Working peak reverse voltage (recommended operating condition) | VRWM | | | 3.3 | V | | 2 |
| Working peak reverse voltage | VRWM | | | 3.3 | V | | 5 |
| Total capacitance | Ct | | 0.3 | 0.45 | pF | VR = 0 V, f = 1 MHz | 5 |
| First peak voltage | Vpeak | | | 6 | V | | 5 |
| Reverse current | IR | | | 0.1 | µA | VRWM = 3.3 V | 5 |
| Clamp voltage | VC | | | 15 | V | | 5 |
| Electrostatic discharge voltage (IEC61000-4-2) (Contact) | VESD | -20 | | 20 | kV | IEC61000-4-2 (Contact) | 4 |
| Electrostatic discharge voltage (IEC61000-4-2) (Air) | VESD | -20 | | 20 | kV | IEC61000-4-2 (Air) | 4 |
| Peak pulse power (tp = 8/20 µs) | PPK | | | 37 | W | tp = 8/20 µs, IEC61000-4-5 | 4 |
| Peak pulse current (tp = 8/20 µs) | IPP | | | 2.5 | A | tp = 8/20 µs, IEC61000-4-5 | 4 |
| Junction temperature | Tj | | | 150 | °C | | 4 |
| Storage temperature | Tstg | -55 | | 150 | °C | | 4 |
## CAD (KiCad official)
- Symbol: `DF2B5M5CT`
- Footprint: `Diode_SMD:D_SOD-882`
- 3D model: SOD-882 (KiCad packages3D, STEP)
- 3D model files: `df2b5m5ct-etched.step` / `df2b5m5ct-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `df2b5m5ct.step` / `df2b5m5ct.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [TOSHIBA datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8600660121878085632) (9 pp, sha256 `612adf1d25149cae`, retrieved 2026-10-16, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/df2b5m5ct-datasheet.pdf)