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DDTC123JCA-7-F

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Diodes Incorporated Digital Transistors, SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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DDTC123JCA-7-F

Diodes Incorporated · Digital Transistors · SOT-23

DDTC123JCA-7-F from Diodes Incorporated, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN input Input to the built-in base bias network (R1 = 2.2kΩ nominal, R2 = 47kΩ nominal for DDTC123JCA); input voltage is limited to -5 V to +12 V referenced to pin 2 (GND).
2 GND power_in Common ground and transistor emitter; all input and supply voltage ratings are referenced to this pin.
3 OUT output Collector output; supply voltage VCC is rated up to 50 V from pin 3 to pin 2, and output current is limited to 100 mA (IC(MAX)).

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SOT-23
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Resistor R1 (NOM) R1 2.2 KΩ 1
Resistor R2 (NOM) R2 47 KΩ 1
Input Resistor Tolerance R1 -30 30 % 3
Resistance Ratio Tolerance R2/R1 -20 20 % 3
Input Voltage (OFF) Vl(OFF) 0.5 V VCC = 5V, IO = 100μA 3
Input Voltage (ON) Vl(ON) 1.1 V VO = 0.3V, IO = 5mA 3
Output Voltage VO(ON) 0.1 0.3 V IO/Il = 5mA/0.25mA 3
Input Current Il 3.6 mA VI = 5V 3
Output Current (OFF) IO(OFF) 0.5 μA VCC = 50V, VI = 0V 3
DC Current Gain Gl 80 VO = 5V, IO = 10mA 3
Gain-Bandwidth Product (transistor, for reference only) fT 250 MHz VCE = 10V, IE = 5mA, f = 100MHz 3
Supply Voltage (Pin 3 to Pin 2) VCC 50 V @TA = +25°C 2
Input Voltage (Pin 1 to Pin 2) VIN -5 12 V @TA = +25°C 2
Output Current IO 100 mA @TA = +25°C 2
Output Current (all variants) IC(MAX) 100 mA @TA = +25°C 2
Power Dissipation PD 200 mW Note 6: mounted on FR4 PC board, minimum recommended pad layout 2
Thermal Resistance, Junction to Ambient Air RθJA 625 C/W Note 6: mounted on FR4 PC board, minimum recommended pad layout 2
Operating and Storage Temperature Range TJ, TSTG -55 150 C 2

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin  Terminals: Finish, Matte Tin Plated Leads, Solderable per MIL-STD-202, Method 208 1

CAD (KiCad official)

  • Symbol: DDTC123JCA-7-F
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: ddtc123jca-7-f-etched.step / ddtc123jca-7-f-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ddtc123jca-7-f.step / ddtc123jca-7-f.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (6 pp, sha256 0cc5dc96040d959d, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF