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DDTC115EUA-7-F

Public Made by Adom

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Diodes Incorporated Digital Transistors, SOT-323. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

Schematic Symbol

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PCB Footprint

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Datasheet

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Contents

README

markdown

DDTC115EUA-7-F

Diodes Incorporated · Digital Transistors · SOT-323

DDTC115EUA-7-F from Diodes Incorporated, in a SOT-323. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN input Input pin to the built-in base bias resistor R1 (100k nominal for DDTC115EUA); the input voltage must stay within -10 V to +40 V per the absolute maximum ratings.
2 GND power_in Ground reference (device emitter, pin 0 V) to which VCC and VIN are referenced.
3 OUT output Output pin (collector of the NPN transistor); supply voltage VCC is rated at 50 V maximum from pin 3 to pin 2 and output current IO is rated at 20 mA for DDTC115EUA.

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SOT-323
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Voltage (DDTC115EUA) VIN -10 40 V Pin: (1) to (2), DDTC115EUA 2
Supply Voltage VCC 50 V Pin: (3) to (2) 2
Output Current (DDTC115EUA) IO 20 mA DDTC115EUA 2
Output Current All IC(MAX) 100 mA All 2
Power Dissipation PD 200 mW Note 6: FR-4 PC board, minimum recommended pad layout 2
Thermal Resistance, Junction to Ambient Air RθJA 625 C/W Note 6: FR-4 PC board, minimum recommended pad layout 2
Operating and Storage Temperature Range TJ, TSTG -55 150 C 2
Input Voltage (off) Vl(OFF) 0.5 1.1 V VCC = 5V, IO = 100µA 2
Input Voltage (on) (DDTC115EUA) Vl(ON) 1.9 3 V VO = 0.3V, IO = 1mA, DDTC115EUA 2
Output Voltage (on) VO(ON) 0.1 0.3 V IO/Il = 5mA/0.25mA, DDTC115EUA 2
Input Current (DDTC115EUA) Il 0.15 mA VI = 5V, DDTC115EUA 2
Output Current (off) IO(OFF) 0.5 µA VCC = 50V, VI = 0V 2
DC Current Gain (DDTC115EUA) Gl 82 VO = 5V, IO = 5mA 2
Input Resistor (R1) Tolerance R1 -30 30 % 2
Resistance Ratio R2/R1 0.8 1 1.2 2
Input Resistor R1 (NOM) (DDTC115EUA) R1 100 kΩ 1

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin  Terminals: Finish, Matte Tin Plated Leads, Solderable per MIL-STD-202, Method 208 1

CAD (KiCad official)

  • Symbol: DDTC115EUA-7-F
  • Footprint: Package_TO_SOT_SMD:SOT-323_SC-70
  • 3D model: SOT-323 (KiCad packages3D, STEP)
  • 3D model files: ddtc115eua-7-f-etched.step / ddtc115eua-7-f-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ddtc115eua-7-f.step / ddtc115eua-7-f.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (5 pp, sha256 aaf1276e48864742, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF