component

DDTC114YE-7-F

Public Made by Adom

by adom

Diodes Incorporated Digital Transistors, SOT-523. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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DDTC114YE-7-F

Diodes Incorporated · Digital Transistors · SOT-523

DDTC114YE-7-F from Diodes Incorporated, in a SOT-523. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN input Input (base side, through built-in R1) of the NPN pre-biased transistor; input voltage to pin 2 is rated -6 to +40 V for DDTC114YE.
2 GND power_in Ground (0) / emitter; reference for the input voltage (1 to 2) and supply voltage (3 to 2) ratings.
3 OUT output Output (collector); supply voltage (3) to (2) is rated 50 V max and output current is 70 mA max for DDTC114YE.

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SOT-523
Category Triode/MOS Tube/Transistor
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Voltage (off) Vl(off) 0.3 V VCC = 5V, IO = 100μA 2
Input Voltage (on) Vl(on) 1.4 V VO = 0.3V, IO = 1mA 2
Output Voltage VO(on) 0.1 0.3 V IO/Il = 5mA/0.25mA 2
Input Current Il 0.88 mA VI = 5V 2
Output Current (off) IO(off) 0.5 μA VCC = 50V, VI = 0V 2
DC Current Gain Gl 68 VO = 5V, IO = 5mA 2
Input Resistor Tolerance ΔR1 -30 30 % 2
Resistance Ratio Tolerance ΔR2/R1 -20 20 % 2
Supply Voltage VCC 50 V (3) to (2), TA = 25°C 1
Input Voltage VIN -6 40 V (1) to (2), TA = 25°C 1
Output Current IO 70 mA TA = 25°C 1
Power Dissipation Pd 150 mW TA = 25°C 2
Operating and Storage Temperature Range Tj, TSTG -55 150 °C 2
Thermal Resistance, Junction to Ambient Air RθJA 833 °C/W Note 1, TA = 25°C 2
Gain-Bandwidth Product fT 250 MHz VCE = 10V, IE = 5mA, f = 100MHz 2

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin • Terminals: Solderable per MIL-STD-202, Method 208 • Lead Free Plating (Matte Tin Finish annealed over Alloy 42 1

CAD (KiCad official)

  • Symbol: DDTC114YE-7-F
  • Footprint: Package_TO_SOT_SMD:SOT-523
  • 3D model: SOT-523, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.8 mm nominal SOT-523 height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: ddtc114ye-7-f-etched.step / ddtc114ye-7-f-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ddtc114ye-7-f.step / ddtc114ye-7-f.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (4 pp, sha256 d2661de44cd9b2e1, retrieved 2026-10-26, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF