component
DDTC114ECAQ-7-F
Public Made by Adomby adom
Diodes Incorporated Digital Transistors, SOT-23-3. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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DDTC114ECAQ-7-F
Diodes Incorporated · Digital Transistors · SOT-23-3
DDTC114ECAQ-7-F from Diodes Incorporated, in a SOT-23-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | input | Input to the built-in bias network (R1 = 10kΩ nominal for DDTC114ECA); the input voltage is limited to -10 V to +40 V (pin 1 to pin 2) and the input current is 0.88 mA at VI = 5 V. |
| 2 | GND | power_in | Ground and common reference for the device, used as the reference for the supply and input voltage ratings (pin 3 to pin 2 supply up to 50 V, pin 1 to pin 2 input -10 V to +40 V). |
| 3 | OUT | output | Open-collector NPN output, rated at 50 mA output current (DDTC114ECA) and 100 mA maximum collector current, with supply voltage VCC up to 50 V referenced to pin 2. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-23-3 |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage off (Vl(off)), as printed in the min/typ/max columns | Vl(off) | 0.5 | 1.1 | V | VCC = 5V, IO = 100μA | 2 | |
| Input voltage on (Vl(on)) | Vl(on) | 1.9 | 3 | V | VO = 0.3V, IO = 10mA, DDTC114ECA | 2 | |
| Output voltage on (VO(on)) | VO(on) | 0.1 | 0.3 | V | IO/Il = 10mA/0.5mA, DDTC114ECA | 2 | |
| Input current | Il | 0.88 | mA | VI = 5V | 2 | ||
| Output current (off) | IO(off) | 0.5 | μA | VCC = 50V, VI = 0V | 2 | ||
| DC current gain (DDTC114ECAQ column) | Gl | 35 | VO = 5V, IO = 5mA | 2 | |||
| Input resistor tolerance | R1 | -30 | 30 | % | 2 | ||
| Resistance ratio tolerance | R2/R1 | 0.8 | 1 | 1.2 | % | 2 | |
| Supply voltage | VCC | 50 | V | Pin (3) to (2) | 2 | ||
| Input voltage | VIN | -10 | 40 | V | Pin (1) to (2), DDTC114ECA | 2 | |
| Output current | IO | 50 | mA | DDTC114ECA | 2 | ||
| Output current IC (max) | IC | 100 | mA | 2 | |||
| Power dissipation | PD | 200 | mW | Mounted on FR4 PC board with minimum recommended pad layout (Note 7) | 2 | ||
| Thermal resistance, junction to ambient air | RθJA | 625 | °C/W | Mounted on FR4 PC board with minimum recommended pad layout (Note 7) | 2 | ||
| Operating and storage temperature range | TJ, TSTG | -55 | 150 | °C | 2 | ||
| Input resistor R1 (nominal) | R1 | 10 | kΩ | 1 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | Terminals: Finish, Matte Tin Plated Leads, Solderable per MIL-STD-202, Method 208 | 1 |
CAD (KiCad official)
- Symbol:
DDTC114ECAQ-7-F - Footprint:
Package_TO_SOT_SMD:SOT-23-3 - 3D model: SOT-23-3 (KiCad packages3D, STEP)
- 3D model files:
ddtc114ecaq-7-f-etched.step/ddtc114ecaq-7-f-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ddtc114ecaq-7-f.step/ddtc114ecaq-7-f.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (5 pp, sha256
b71e1c1af45adb44, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# DDTC114ECAQ-7-F
**Diodes Incorporated** · Digital Transistors · SOT-23-3
DDTC114ECAQ-7-F from Diodes Incorporated, in a SOT-23-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | input | Input to the built-in bias network (R1 = 10kΩ nominal for DDTC114ECA); the input voltage is limited to -10 V to +40 V (pin 1 to pin 2) and the input current is 0.88 mA at VI = 5 V. |
| 2 | GND | power_in | Ground and common reference for the device, used as the reference for the supply and input voltage ratings (pin 3 to pin 2 supply up to 50 V, pin 1 to pin 2 input -10 V to +40 V). |
| 3 | OUT | output | Open-collector NPN output, rated at 50 mA output current (DDTC114ECA) and 100 mA maximum collector current, with supply voltage VCC up to 50 V referenced to pin 2. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-23-3 |
| Category | Transistors/Thyristors |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage off (Vl(off)), as printed in the min/typ/max columns | Vl(off) | 0.5 | | 1.1 | V | VCC = 5V, IO = 100μA | 2 |
| Input voltage on (Vl(on)) | Vl(on) | | 1.9 | 3 | V | VO = 0.3V, IO = 10mA, DDTC114ECA | 2 |
| Output voltage on (VO(on)) | VO(on) | | 0.1 | 0.3 | V | IO/Il = 10mA/0.5mA, DDTC114ECA | 2 |
| Input current | Il | | | 0.88 | mA | VI = 5V | 2 |
| Output current (off) | IO(off) | | | 0.5 | μA | VCC = 50V, VI = 0V | 2 |
| DC current gain (DDTC114ECAQ column) | Gl | 35 | | | | VO = 5V, IO = 5mA | 2 |
| Input resistor tolerance | R1 | -30 | | 30 | % | | 2 |
| Resistance ratio tolerance | R2/R1 | 0.8 | 1 | 1.2 | % | | 2 |
| Supply voltage | VCC | | | 50 | V | Pin (3) to (2) | 2 |
| Input voltage | VIN | -10 | | 40 | V | Pin (1) to (2), DDTC114ECA | 2 |
| Output current | IO | | | 50 | mA | DDTC114ECA | 2 |
| Output current IC (max) | IC | | | 100 | mA | | 2 |
| Power dissipation | PD | | | 200 | mW | Mounted on FR4 PC board with minimum recommended pad layout (Note 7) | 2 |
| Thermal resistance, junction to ambient air | RθJA | | | 625 | °C/W | Mounted on FR4 PC board with minimum recommended pad layout (Note 7) | 2 |
| Operating and storage temperature range | TJ, TSTG | -55 | | 150 | °C | | 2 |
| Input resistor R1 (nominal) | R1 | | 10 | | kΩ | | 1 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | | tin | Terminals: Finish, Matte Tin Plated Leads, Solderable per MIL-STD-202, Method 208 | 1 |
## CAD (KiCad official)
- Symbol: `DDTC114ECAQ-7-F`
- Footprint: `Package_TO_SOT_SMD:SOT-23-3`
- 3D model: SOT-23-3 (KiCad packages3D, STEP)
- 3D model files: `ddtc114ecaq-7-f-etched.step` / `ddtc114ecaq-7-f-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ddtc114ecaq-7-f.step` / `ddtc114ecaq-7-f.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Diodes Incorporated datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8600586684329037824) (5 pp, sha256 `b71e1c1af45adb44`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ddtc114ecaq-7-f-datasheet.pdf)