component
DDTC114ECA-7-F
Public Made by Adomby adom
Diodes Incorporated Digital Transistors, SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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DDTC114ECA-7-F
Diodes Incorporated · Digital Transistors · SOT-23
DDTC114ECA-7-F from Diodes Incorporated, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model). Symbol and footprint from KiCad-official CAD; the 3D model is generated from the datasheet's package dimensions.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | input | Input through the built-in 10kΩ base resistor R1 (DDTC114ECA), with input voltage VIN rated -10 to +40V relative to pin 2. |
| 2 | GND | power_in | Ground (0V) reference for the input and the output supply voltage. |
| 3 | OUT | output | Output (collector) of the NPN transistor, with supply voltage VCC rated 50V relative to pin 2 and output current IO of 50mA for DDTC114ECA. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-23 |
| Category | Transistors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage (off) | Vl(off) | 0.5 | 1.1 | V | VCC = 5V, IO = 100μA | 2 | |
| Input Voltage (on) | Vl(on) | 1.9 | 3 | V | VO = 0.3V, IO = 10mA | 2 | |
| Output Voltage | VO(on) | 0.1 | 0.3 | V | IO/Il = 10mA/0.5mA | 2 | |
| Input Current | Il | 0.88 | mA | VI = 5V | 2 | ||
| Output Current (off) | IO(off) | 0.5 | μA | VCC = 50V, VI = 0V | 2 | ||
| DC Current Gain | Gl | 30 | VO = 5V, IO = 5mA | 2 | |||
| Input Resistor Tolerance | R1 | -30 | 30 | % | 2 | ||
| Resistance Ratio Tolerance | R2/R1 | 0.8 | 1 | 1.2 | % | 2 | |
| Input/Bias Resistor Nominal | R1, R2 | 10 | kΩ | NOM | 1 | ||
| Gain-Bandwidth Product | fT | 250 | MHz | VCE = 10V, IE = 5mA, f = 100MHz | 2 | ||
| Supply Voltage | VCC | 50 | V | Pin 3 to 2, TA = +25°C | 2 | ||
| Input Voltage | VIN | -10 | 40 | V | Pin 1 to 2, TA = +25°C | 2 | |
| Output Current | IO | 50 | mA | DDTC114ECA, TA = +25°C | 2 | ||
| Output Current IC (Max) | IC | 100 | mA | TA = +25°C | 2 | ||
| Power Dissipation | PD | 200 | mW | Note 7, TA = +25°C | 2 | ||
| Thermal Resistance, Junction to Ambient | RθJA | 625 | °C/W | Note 7, FR4 PC board minimum recommended pad layout | 2 | ||
| Operating and Storage Temperature Range | TJ, TSTG | -55 | 150 | °C | 2 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | Terminals: Finish, Matte Tin Plated Leads, Solderable per MIL-STD-202, Method 208 | 1 |
CAD (land: KiCad; 3D: generated from the datasheet)
- Symbol:
DDTC114ECA-7-F - Footprint:
Package_TO_SOT_SMD:SOT-23 - 3D model: SOT-23, generated on the KiCad land (body 1.3 x 2.9 mm, terminals on the pads, 1.025 mm tall, datasheet A, nominal). KiCad's stock model for this land is taller than the datasheet allows, so the model is generated from the datasheet drawing; the dimensions come from the datasheet drawing where it was read and are defaults otherwise (see provenance.model_3d_generated), not the manufacturer's CAD (STEP)
- 3D model files:
ddtc114eca-7-f-etched.step/ddtc114eca-7-f-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ddtc114eca-7-f.step/ddtc114eca-7-f.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (5 pp, sha256
b71e1c1af45adb44, retrieved 2026-11-13, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: land: KiCad official libraries (CC-BY-SA 4.0); 3D: generated from the datasheet's package dimensions (provenance.model_3d_generated).
# DDTC114ECA-7-F
**Diodes Incorporated** · Digital Transistors · SOT-23
DDTC114ECA-7-F from Diodes Incorporated, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model). Symbol and footprint from KiCad-official CAD; the 3D model is generated from the datasheet's package dimensions.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | input | Input through the built-in 10kΩ base resistor R1 (DDTC114ECA), with input voltage VIN rated -10 to +40V relative to pin 2. |
| 2 | GND | power_in | Ground (0V) reference for the input and the output supply voltage. |
| 3 | OUT | output | Output (collector) of the NPN transistor, with supply voltage VCC rated 50V relative to pin 2 and output current IO of 50mA for DDTC114ECA. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-23 |
| Category | Transistors |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage (off) | Vl(off) | 0.5 | | 1.1 | V | VCC = 5V, IO = 100μA | 2 |
| Input Voltage (on) | Vl(on) | | 1.9 | 3 | V | VO = 0.3V, IO = 10mA | 2 |
| Output Voltage | VO(on) | | 0.1 | 0.3 | V | IO/Il = 10mA/0.5mA | 2 |
| Input Current | Il | | | 0.88 | mA | VI = 5V | 2 |
| Output Current (off) | IO(off) | | | 0.5 | μA | VCC = 50V, VI = 0V | 2 |
| DC Current Gain | Gl | 30 | | | | VO = 5V, IO = 5mA | 2 |
| Input Resistor Tolerance | R1 | -30 | | 30 | % | | 2 |
| Resistance Ratio Tolerance | R2/R1 | 0.8 | 1 | 1.2 | % | | 2 |
| Input/Bias Resistor Nominal | R1, R2 | | 10 | | kΩ | NOM | 1 |
| Gain-Bandwidth Product | fT | | 250 | | MHz | VCE = 10V, IE = 5mA, f = 100MHz | 2 |
| Supply Voltage | VCC | | | 50 | V | Pin 3 to 2, TA = +25°C | 2 |
| Input Voltage | VIN | -10 | | 40 | V | Pin 1 to 2, TA = +25°C | 2 |
| Output Current | IO | | | 50 | mA | DDTC114ECA, TA = +25°C | 2 |
| Output Current IC (Max) | IC | | | 100 | mA | TA = +25°C | 2 |
| Power Dissipation | PD | | | 200 | mW | Note 7, TA = +25°C | 2 |
| Thermal Resistance, Junction to Ambient | RθJA | | 625 | | °C/W | Note 7, FR4 PC board minimum recommended pad layout | 2 |
| Operating and Storage Temperature Range | TJ, TSTG | -55 | | 150 | °C | | 2 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | | tin | Terminals: Finish, Matte Tin Plated Leads, Solderable per MIL-STD-202, Method 208 | 1 |
## CAD (land: KiCad; 3D: generated from the datasheet)
- Symbol: `DDTC114ECA-7-F`
- Footprint: `Package_TO_SOT_SMD:SOT-23`
- 3D model: SOT-23, generated on the KiCad land (body 1.3 x 2.9 mm, terminals on the pads, 1.025 mm tall, datasheet A, nominal). KiCad's stock model for this land is taller than the datasheet allows, so the model is generated from the datasheet drawing; the dimensions come from the datasheet drawing where it was read and are defaults otherwise (see provenance.model_3d_generated), not the manufacturer's CAD (STEP)
- 3D model files: `ddtc114eca-7-f-etched.step` / `ddtc114eca-7-f-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ddtc114eca-7-f.step` / `ddtc114eca-7-f.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Diodes Incorporated datasheet](https://www.diodes.com/assets/Datasheets/DDTC114ECA-7-F.pdf) (5 pp, sha256 `b71e1c1af45adb44`, retrieved 2026-11-13, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** land: KiCad official libraries (CC-BY-SA 4.0); 3D: generated from the datasheet's package dimensions (provenance.model_3d_generated).
[Datasheet PDF](docs/ddtc114eca-7-f-datasheet.pdf)