component
DDTA143EE-7-F
Public Made by Adomby adom
Diodes Incorporated Digital Transistors, SOT-523. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
DDTA143EE-7-F
Diodes Incorporated · Digital Transistors · SOT-523
DDTA143EE-7-F from Diodes Incorporated, in a SOT-523. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | input | Input to the built-in base bias network (R1 = 4.7kΩ NOM for DDTA143EE); input voltage is limited to +10 to -30 V relative to pin 2 (GND). |
| 2 | GND | power_in | Ground reference for the input voltage rating (pin 1 to pin 2) and the supply voltage rating (pin 3 to pin 2). |
| 3 | OUT | output | Output (collector of the internal PNP transistor); supply voltage VCC is limited to 50 V from pin 3 to pin 2, and output current IO is limited to -100 mA for DDTA143EE. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-523 |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Resistor Tolerance (R1) | R1 | -30 | 30 | % | 2 | ||
| Resistance Ratio Tolerance (R2/R1) | R2/R1 | 0.8 | 1 | 1.2 | % | 2 | |
| DC Current Gain | Gl | -20 | VO = -5V, IO = -10mA (DDTA143EE) | 2 | |||
| Input Current | Il | -1.8 | mA | VI = -5V (DDTA143EE) | 2 | ||
| Output Current | IO(OFF) | -0.5 | µA | VCC = -50V, VI = 0V | 2 | ||
| Output Voltage | VO(ON) | -0.1 | -0.3 | V | IO/Il = -10mA/-0.5mA (DDTA143EE) | 2 | |
| Supply Voltage | VCC | 50 | V | Pin 3 to Pin 2 | 2 | ||
| Input Voltage | VIN | -30 | 10 | V | Pin 1 to Pin 2 (DDTA143EE) | 2 | |
| Output Current | IO | -100 | mA | DDTA143EE | 2 | ||
| Output Current (IC max) | IC (Max) | -100 | mA | 2 | |||
| Power Dissipation | PD | 150 | mW | Notes 5 & 6 (per element) | 2 | ||
| Thermal Resistance, Junction to Ambient Air | RθJA | 833 | °C/W | Note 5 | 2 | ||
| Operating and Storage Temperature Range | TJ, TSTG | -55 | 150 | °C | 2 | ||
| Input Resistor (R1, nominal) | R1 | 4.7 | kΩ | DDTA143EE nominal, per ordering/marking table | 1 | ||
| Gain-Bandwidth Product | fT | 250 | MHz | VCE = -10V, IE = 5mA, f = 100MHz (transistor only) | 2 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | Terminals: Finish, Matte Tin Plated Leads, Solderable per MIL-STD-202, Method 208 | 1 |
CAD (KiCad official)
- Symbol:
DDTA143EE-7-F - Footprint:
Package_TO_SOT_SMD:SOT-523 - 3D model: SOT-523, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.8 mm nominal SOT-523 height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files:
ddta143ee-7-f-etched.step/ddta143ee-7-f-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ddta143ee-7-f.step/ddta143ee-7-f.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (5 pp, sha256
67f73dcb3690a4c5, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# DDTA143EE-7-F
**Diodes Incorporated** · Digital Transistors · SOT-523
DDTA143EE-7-F from Diodes Incorporated, in a SOT-523. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | input | Input to the built-in base bias network (R1 = 4.7kΩ NOM for DDTA143EE); input voltage is limited to +10 to -30 V relative to pin 2 (GND). |
| 2 | GND | power_in | Ground reference for the input voltage rating (pin 1 to pin 2) and the supply voltage rating (pin 3 to pin 2). |
| 3 | OUT | output | Output (collector of the internal PNP transistor); supply voltage VCC is limited to 50 V from pin 3 to pin 2, and output current IO is limited to -100 mA for DDTA143EE. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-523 |
| Category | Transistors/Thyristors |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Resistor Tolerance (R1) | R1 | -30 | | 30 | % | | 2 |
| Resistance Ratio Tolerance (R2/R1) | R2/R1 | 0.8 | 1 | 1.2 | % | | 2 |
| DC Current Gain | Gl | -20 | | | | VO = -5V, IO = -10mA (DDTA143EE) | 2 |
| Input Current | Il | | | -1.8 | mA | VI = -5V (DDTA143EE) | 2 |
| Output Current | IO(OFF) | | | -0.5 | µA | VCC = -50V, VI = 0V | 2 |
| Output Voltage | VO(ON) | | -0.1 | -0.3 | V | IO/Il = -10mA/-0.5mA (DDTA143EE) | 2 |
| Supply Voltage | VCC | | | 50 | V | Pin 3 to Pin 2 | 2 |
| Input Voltage | VIN | -30 | | 10 | V | Pin 1 to Pin 2 (DDTA143EE) | 2 |
| Output Current | IO | -100 | | | mA | DDTA143EE | 2 |
| Output Current (IC max) | IC (Max) | -100 | | | mA | | 2 |
| Power Dissipation | PD | | | 150 | mW | Notes 5 & 6 (per element) | 2 |
| Thermal Resistance, Junction to Ambient Air | RθJA | | | 833 | °C/W | Note 5 | 2 |
| Operating and Storage Temperature Range | TJ, TSTG | -55 | | 150 | °C | | 2 |
| Input Resistor (R1, nominal) | R1 | | 4.7 | | kΩ | DDTA143EE nominal, per ordering/marking table | 1 |
| Gain-Bandwidth Product | fT | | 250 | | MHz | VCE = -10V, IE = 5mA, f = 100MHz (transistor only) | 2 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | | tin | Terminals: Finish, Matte Tin Plated Leads, Solderable per MIL-STD-202, Method 208 | 1 |
## CAD (KiCad official)
- Symbol: `DDTA143EE-7-F`
- Footprint: `Package_TO_SOT_SMD:SOT-523`
- 3D model: SOT-523, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.8 mm nominal SOT-523 height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files: `ddta143ee-7-f-etched.step` / `ddta143ee-7-f-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ddta143ee-7-f.step` / `ddta143ee-7-f.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Diodes Incorporated datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588912364150669312) (5 pp, sha256 `67f73dcb3690a4c5`, retrieved 2026-10-17, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ddta143ee-7-f-datasheet.pdf)