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DDTA143ECA-7-F
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Diodes Incorporated Digital Transistors, SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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DDTA143ECA-7-F
Diodes Incorporated · Digital Transistors · SOT-23
DDTA143ECA-7-F from Diodes Incorporated, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | input | Input pin for the DDTA143ECA, with input voltage limited to +10 V to -30 V relative to pin 2 (GND) and input current Il of -1.8 mA at VI = -5 V. |
| 2 | GND | power_in | Ground reference for the input and supply voltages; VIN is specified from pin 1 to pin 2 and VCC from pin 3 to pin 2. |
| 3 | OUT | output | Output pin for the DDTA143ECA, with output current IO limited to -100 mA and supply voltage VCC limited to -50 V measured from pin 3 to pin 2. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-23 |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Resistor Tolerance | R1 | -30 | 30 | % | 2 | ||
| Resistance Ratio Tolerance | R2/R1 | 0.8 | 1 | 1.2 | % | 2 | |
| Input Voltage (off) | Vl(off) | -0.5 | -1.1 | V | VCC = -5V, IO = -100A | 2 | |
| Input Voltage (on) | Vl(on) | -1.9 | -3 | V | VO = -0.3V, IO = -20mA | 2 | |
| Output Voltage (on) | VO(on) | -0.1 | -0.3 | V | IO/Il = -10mA/-0.5mA | 2 | |
| Input Current | Il | -1.8 | mA | VI = -5V | 2 | ||
| Output Current (off) | IO(off) | -0.5 | A | VCC = -50V, VI = 0V | 2 | ||
| DC Current Gain | Gl | 20 | VO = -5V, IO = -10mA | 2 | |||
| Supply Voltage | VCC | -50 | V | 2 | |||
| Input Voltage | VIN | -30 | 10 | V | <Pin: (1) to (2)>, DDTA143ECA | 2 | |
| Output Current | IO | -100 | mA | DDTA143ECA | 2 | ||
| Output Current (Max) | IC | -100 | mA | 2 | |||
| Power Dissipation | PD | 200 | mW | @TA = +25°C; Note 7: FR-4 PC board, minimum recommended pad layout | 2 | ||
| Thermal Resistance, Junction to Ambient | RθJA | 625 | °C/W | Note 7: FR-4 PC board, minimum recommended pad layout | 2 | ||
| Operating and Storage Temperature Range | TJ, TSTG | -55 | 150 | °C | 2 | ||
| Built-in Base Resistor R1 (NOM) | R1 | 4.7 | kΩ | 1 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | Terminals: Finish, Matte Tin Plated Leads, Solderable per MIL-STD-202, Method 208 | 1 |
CAD (KiCad official)
- Symbol:
DDTA143ECA-7-F - Footprint:
Package_TO_SOT_SMD:SOT-23 - 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files:
ddta143eca-7-f-etched.step/ddta143eca-7-f-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ddta143eca-7-f.step/ddta143eca-7-f.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (5 pp, sha256
238b94f121ac7005, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# DDTA143ECA-7-F
**Diodes Incorporated** · Digital Transistors · SOT-23
DDTA143ECA-7-F from Diodes Incorporated, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | input | Input pin for the DDTA143ECA, with input voltage limited to +10 V to -30 V relative to pin 2 (GND) and input current Il of -1.8 mA at VI = -5 V. |
| 2 | GND | power_in | Ground reference for the input and supply voltages; VIN is specified from pin 1 to pin 2 and VCC from pin 3 to pin 2. |
| 3 | OUT | output | Output pin for the DDTA143ECA, with output current IO limited to -100 mA and supply voltage VCC limited to -50 V measured from pin 3 to pin 2. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-23 |
| Category | Transistors/Thyristors |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Resistor Tolerance | R1 | -30 | | 30 | % | | 2 |
| Resistance Ratio Tolerance | R2/R1 | 0.8 | 1 | 1.2 | % | | 2 |
| Input Voltage (off) | Vl(off) | | -0.5 | -1.1 | V | VCC = -5V, IO = -100A | 2 |
| Input Voltage (on) | Vl(on) | | -1.9 | -3 | V | VO = -0.3V, IO = -20mA | 2 |
| Output Voltage (on) | VO(on) | | -0.1 | -0.3 | V | IO/Il = -10mA/-0.5mA | 2 |
| Input Current | Il | | | -1.8 | mA | VI = -5V | 2 |
| Output Current (off) | IO(off) | | | -0.5 | A | VCC = -50V, VI = 0V | 2 |
| DC Current Gain | Gl | 20 | | | | VO = -5V, IO = -10mA | 2 |
| Supply Voltage | VCC | | | -50 | V | | 2 |
| Input Voltage | VIN | -30 | | 10 | V | <Pin: (1) to (2)>, DDTA143ECA | 2 |
| Output Current | IO | | | -100 | mA | DDTA143ECA | 2 |
| Output Current (Max) | IC | | | -100 | mA | | 2 |
| Power Dissipation | PD | | | 200 | mW | @TA = +25°C; Note 7: FR-4 PC board, minimum recommended pad layout | 2 |
| Thermal Resistance, Junction to Ambient | RθJA | | 625 | | °C/W | Note 7: FR-4 PC board, minimum recommended pad layout | 2 |
| Operating and Storage Temperature Range | TJ, TSTG | -55 | | 150 | °C | | 2 |
| Built-in Base Resistor R1 (NOM) | R1 | | 4.7 | | kΩ | | 1 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | | tin | Terminals: Finish, Matte Tin Plated Leads, Solderable per MIL-STD-202, Method 208 | 1 |
## CAD (KiCad official)
- Symbol: `DDTA143ECA-7-F`
- Footprint: `Package_TO_SOT_SMD:SOT-23`
- 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files: `ddta143eca-7-f-etched.step` / `ddta143eca-7-f-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ddta143eca-7-f.step` / `ddta143eca-7-f.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Diodes Incorporated datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8560093017395511296) (5 pp, sha256 `238b94f121ac7005`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ddta143eca-7-f-datasheet.pdf)