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DDTA114WUA-7-F

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Diodes Incorporated Digital Transistors, SOT-323. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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DDTA114WUA-7-F

Diodes Incorporated · Digital Transistors · SOT-323

DDTA114WUA-7-F from Diodes Incorporated, in a SOT-323. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN input Input terminal of the pre-biased PNP inverter, rated +10 V to -30 V relative to pin 2 (GND) for DDTA114WUA.
2 GND power_in Common ground reference for the input (pin 1) and supply (pin 3) voltage ratings; the datasheet labels it GND(+).
3 OUT output Collector output terminal; supply voltage VCC from pin 3 to pin 2 is rated at -50 V maximum and output current at -100 mA maximum for DDTA114WUA.

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SOT-323
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Voltage (on) Vl(on) -3 V VO = -0.3V, IO = -2mA 2
Input Voltage (off) Vl(off) -0.8 V VCC = 5V, IO = 100μA 2
Output Voltage VO(on) -0.1 -0.3 V IO/Il = -10mA/-0.5mA 2
Input Current Il -0.88 mA VI = -5V 2
Output Current (off) IO(off) -0.5 μA VCC = -50V, VI = 0V 2
DC Current Gain Gl -24 VO = -5V, IO = -10mA 2
Input Resistor Tolerance ΔR1 -30 30 % 2
Resistance Ratio Tolerance ΔR2/R1 -20 20 % 2
Supply Voltage VCC -50 V (3) to (2) 1
Input Voltage VIN -30 10 V (1) to (2) 1
Output Current IO -100 mA 1
Output Current (all IC max) IC (Max) -100 mA 2
Power Dissipation Pd 200 mW 2
Operating and Storage Temperature Range Tj, TSTG -55 150 °C 2
Thermal Resistance, Junction to Ambient RθJA 625 °C/W Mounted on FR4 PC board with recommended pad layout (Note 4) 2

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin • Terminals: Solderable per MIL-STD-202, Method 208 • Lead Free Plating (Matte Tin Finish annealed over 1

CAD (KiCad official)

  • Symbol: DDTA114WUA-7-F
  • Footprint: Package_TO_SOT_SMD:SOT-323_SC-70
  • 3D model: SOT-323 (KiCad packages3D, STEP)
  • 3D model files: ddta114wua-7-f-etched.step / ddta114wua-7-f-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ddta114wua-7-f.step / ddta114wua-7-f.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (4 pp, sha256 d7af473cdacc488b, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF