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Ray Publish 0.1.0 0fd1475 10d ago

DDTA114TUA-7-F

Diodes Incorporated · Digital Transistors · SOT-323

DDTA114TUA-7-F from Diodes Incorporated, in a SOT-323. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 B input Base, input through the built-in 10kΩ R1 (±30%) series resistor; VEBO max -5V.
2 E passive Emitter of the PNP transistor; BVEBO min -5V at IE = -50μA.
3 C passive Collector; VCEO -50V, IC max -100mA.

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SOT-323
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input resistor (R1) nominal R1 10 kΩ 1
Input Resistor (R1) Tolerance R1 -30 30 % 2
Collector-Base Breakdown Voltage BVCBO -50 V IC = -50μA 2
Collector-Emitter Breakdown Voltage BVCEO -50 V IC = -1mA 2
Emitter-Base Breakdown Voltage BVEBO -5 V IE = -50μA 2
Collector Cutoff Current ICBO -0.5 μA VCB = -50V 2
Emitter Cutoff Current IEBO -0.5 μA VEB = -4V 2
Collector-Emitter Saturation Voltage VCE(sat) -0.3 V IC/IB = -1mA/-0.1mA 2
DC Current Transfer Ratio hFE 100 250 600 IC = -1mA, VCE = -5V 2
Collector-Base Voltage VCBO -50 V 2
Collector-Emitter Voltage VCEO -50 V 2
Emitter-Base Voltage VEBO -5 V 2
Collector Current IC (Max) -100 mA 2
Power Dissipation PD 200 mW Note 5: mounted on FR4 PC board with minimum recommended pad layout 2
Thermal Resistance, Junction to Ambient Air RθJA 625 °C/W Note 5: mounted on FR4 PC board with minimum recommended pad layout 2
Operating and Storage Temperature Range TJ, TSTG -55 150 °C 2

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin  Terminals: Finish, Matte Tin Plated Leads, Solderable per MIL-STD-202, Method 208 1

CAD (KiCad official)

  • Symbol: DDTA114TUA-7-F
  • Footprint: Package_TO_SOT_SMD:SOT-323_SC-70
  • 3D model: SOT-323 (KiCad packages3D, STEP)
  • 3D model files: ddta114tua-7-f-etched.step / ddta114tua-7-f-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ddta114tua-7-f.step / ddta114tua-7-f.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (5 pp, sha256 5dedfce1036f059b, retrieved 2026-10-29, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF