component

DDTA114EE-7-F

Public Made by Adom

by adom

Diodes Incorporated Digital Transistors, SOT-523. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componenttransistors-thyristorsddta114ee-7-ffactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 23d ago
viewers ddta114ee-7-f: viewers · Ray 23d ago
ddta114ee-7-f-etched.glb Publish 0.1.0 · Ray 23d ago
ddta114ee-7-f-etched.step ddta114ee-7-f: factory component page (tier=lcsc) · Ray 23d ago
ddta114ee-7-f-hero.glb ddta114ee-7-f: hero GLB from the etched model (keeps the MPN mark) · Ray 23d ago
ddta114ee-7-f-hero.overlay.json Publish 0.1.0 · Ray 23d ago
ddta114ee-7-f.glb Publish 0.1.0 · Ray 23d ago
ddta114ee-7-f.kicad_mod Publish 0.1.0 · Ray 23d ago
ddta114ee-7-f.kicad_sym Publish 0.1.0 · Ray 23d ago
ddta114ee-7-f.lbr Publish 0.1.0 · Ray 23d ago
ddta114ee-7-f.step Publish 0.1.0 · Ray 23d ago
package.json Publish 0.1.0 · Ray 23d ago
page.json Set visibility: public · Ray 23d ago
README.md Publish 0.1.0 · Ray 23d ago

DDTA114EE-7-F

Diodes Incorporated · Digital Transistors · SOT-523

DDTA114EE-7-F from Diodes Incorporated, in a SOT-523. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN input Input terminal of the pre-biased transistor (base side, through built-in R1 = 10kΩ); input voltage is limited to +10 V to -40 V relative to pin 2 for the DDTA114EE.
2 GND power_in Common ground reference for the input voltage (pin 1) and supply voltage (pin 3) ratings.
3 OUT output Collector output of the pre-biased PNP transistor; supply voltage VCC is rated up to 50 V from pin 3 to pin 2, and output current is limited to -50 mA for the DDTA114EE (IC max -100 mA).

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SOT-523
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage VCC 50 V Pin (3) to (2) 2
Input Voltage VIN -40 10 V Pin (1) to (2), DDTA114EE 2
Output Current IO -50 mA DDTA114EE 2
Output Current (Max) IC -100 mA 2
Power Dissipation PD 150 mW Notes 5 & 6: FR-4 PCB, minimum recommended pad layout; 150 mW per element must not be exceeded 2
Thermal Resistance, Junction to Ambient Air RθJA 833 °C/W Note 5: mounted on FR-4 PC board with minimum recommended pad layout 2
Operating and Storage Temperature Range TJ, TSTG -55 150 °C 2
Input Voltage (OFF) Vl(OFF) -0.5 -1.1 V VCC = -5V, IO = -100µA 2
Input Voltage (ON) Vl(ON) -1.9 -3 V VO = -0.3V, IO = -1mA, DDTA115EE column pattern; for DDTA114EE: VO = -0.3V, IO = -10mA 2
Output Voltage (ON) VO(ON) -0.1 -0.3 V IO/Il = -10mA/-0.5mA, DDTA114EE 2
Input Current Il -0.88 mA VI = -5V, DDTA114EE 2
Output Current (OFF) IO(OFF) -0.5 µA VCC = -50V, VI = 0V 2
DC Current Gain Gl -30 VO = -5V, IO = -5mA, DDTA114EE 2
Input Resistor Tolerance R1 -30 30 % 2
Resistance Ratio Tolerance R2/R1 0.8 1 1.2 % 2
Input Resistor R1 (NOM) R1 10 kΩ Nominal value for DDTA114EE (R1 = R2 = 10kΩ), per marking/ordering table 1

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin  Terminals: Finish, Matte Tin Plated Leads, Solderable per MIL-STD-202, Method 208 1

CAD (KiCad official)

  • Symbol: DDTA114EE-7-F
  • Footprint: Package_TO_SOT_SMD:SOT-523
  • 3D model: SOT-523, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.8 mm nominal SOT-523 height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: ddta114ee-7-f-etched.step / ddta114ee-7-f-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ddta114ee-7-f.step / ddta114ee-7-f.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (5 pp, sha256 67f73dcb3690a4c5, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF