component
DDC114EUQ-13-F
Public Made by Adomby adom
Diodes Incorporated Digital Transistors, SOT-363. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownDDC114EUQ-13-F
Diodes Incorporated · Digital Transistors · SOT-363
DDC114EUQ-13-F from Diodes Incorporated, in a SOT-363. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | COM1 (E1) | passive | Common terminal of the first bias-resistor stage, shown as E1 (emitter of transistor 1) in the device schematic. |
| 2 | IN1 (B1) | input | Input of the first bias-resistor stage (base B1); the DDC114EU input voltage is rated -10 V to +40 V in the absolute maximum ratings. |
| 3 | OUT2 (C2) | output | Output of the second stage (collector C2); output current is rated 50 mA for DDC114EU with 100 mA peak output current. |
| 4 | COM2 (E2) | passive | Common terminal of the second bias-resistor stage, shown as E2 (emitter of transistor 2) in the device schematic. |
| 5 | IN2 (B2) | input | Input of the second bias-resistor stage (base B2); the DDC114EU input voltage is rated -10 V to +40 V in the absolute maximum ratings. |
| 6 | OUT1 (C1) | output | Output of the first stage (collector C1); output current is rated 50 mA for DDC114EU with 100 mA peak output current. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-363 |
| Category | Transistors/Thyristors |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VO | 50 | V | 2 | |||
| Input Voltage (DDC114EU) | VI | -10 | 40 | V | DDC114EU column | 2 | |
| Output Current (DDC114EU) | IO | 50 | mA | DDC114EU column | 2 | ||
| Peak Output Current | ICM | 100 | mA | 2 | |||
| Power Dissipation | PD | 200 | mW | Notes 6 & 7 | 2 | ||
| Power Dissipation per element | PD | 150 | mW | Note 7: must not be exceeded | 2 | ||
| Thermal Resistance, Junction to Ambient Air | RθJA | 625 | °C/W | Note 6 | 2 | ||
| Operating and Storage Temperature Range | TJ, TSTG | -55 | 150 | °C | 2 | ||
| Input Voltage (off) | VI(off) | 0.5 | 1.1 | V | VCC = 5V, IO = 100μA | 3 | |
| Input Voltage (on) | VI(on) | 1.9 | 3 | V | VO = 0.3V, IO = 10mA | 3 | |
| Output Voltage (on) | VO(on) | 0.1 | 0.3 | V | IO/II = 10mA / 0.5mA | 3 | |
| Input Current | II | 0.88 | mA | VI = 5V | 3 | ||
| Output Current (off) | IO(off) | 0.5 | μA | VCC = 50V, VI = 0V | 3 | ||
| DC Current Gain | GI | 30 | VO = 5V, IO = 5mA | 3 | |||
| Input Resistor (R1) Tolerance | R1 | -30 | 30 | % | 3 | ||
| Resistance Ratio Tolerance | R2/R1 | -20 | 20 | % | 3 | ||
| Input Resistor R1 (NOM) | R1 | 10 | kΩ | DDC114EU | 1 | ||
| Input Resistor R2 (NOM) | R2 | 10 | kΩ | DDC114EU | 1 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | Terminals: Finish, Matte Tin Plated Leads, Solderable per MIL-STD-202, Method 208 | 1 |
CAD (KiCad official)
- Symbol:
DDC114EUQ-13-F - Footprint:
Package_TO_SOT_SMD:SOT-363_SC-70-6 - 3D model: SOT-363 (KiCad packages3D, STEP)
- 3D model files:
ddc114euq-13-f-etched.step/ddc114euq-13-f-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ddc114euq-13-f.step/ddc114euq-13-f.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (8 pp, sha256
734b84dde0b96a22, retrieved 2026-10-20, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).