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DDC113TU-7-F

Diodes Incorporated · Digital Transistors · SOT-363

DDC113TU-7-F from Diodes Incorporated, in a SOT-363. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 E1 power_in Emitter/common (COM1) of transistor 1, normally tied to ground.
2 B1 input Base/input (IN1) of transistor 1 through the 1kΩ series resistor R1; input voltage is limited to -5V max.
3 C2 output Collector/output (OUT2) of transistor 2; supply voltage rated 50V max and output current 100mA max.
4 E2 power_in Emitter/common (COM2) of transistor 2, normally tied to ground.
5 B2 input Base/input (IN2) of transistor 2 through the 1kΩ series resistor R1; input voltage is limited to -5V max.
6 C1 output Collector/output (OUT1) of transistor 1; supply voltage rated 50V max and output current 100mA max.

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SOT-363
Category Transistors
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Collector-Base Breakdown Voltage BVCBO 50 V IC = 50μA 3
Collector-Emitter Breakdown Voltage BVCEO 50 V IC = 1mA 3
Emitter-Base Breakdown Voltage BVEBO 5 V IE = 50μA 3
Collector Cutoff Current ICBO 0.5 μA VCB = 50V 3
Emitter Cutoff Current IEBO 0.5 μA VEB = 4V 3
Collector-Emitter Saturation Voltage VCE(sat) 0.3 V IC/IB = 10mA / 1mA (DDC113TU) 3
DC Current Transfer Ratio hFE 100 250 600 IC = 1mA, VCE = 5V 3
Input Resistor (R1) Tolerance R1 -30 30 % 3
Supply Voltage VO 50 V 2
Input Voltage (DDC113TU) VI -5 V DDC113TU column, printed as '-5V max' 2
Output Current (DDC113TU) IO 100 mA DDC113TU column 2
Peak Output Current ICM 100 mA 2
Power Dissipation PD 200 mW Notes 6 & 7: FR-4 PCB, minimum recommended pad layout; 150mW per element must not be exceeded 2
Thermal Resistance, Junction to Ambient Air RθJA 625 °C/W Note 6: FR-4 PCB, minimum recommended pad layout 2
Operating and Storage Temperature Range TJ, TSTG -55 150 °C 2
Input Resistor R1 (NOM) R1 1 kΩ 1

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin  Terminals: Finish, Matte Tin Plated Leads, Solderable per MIL-STD-202, Method 208 1

CAD (KiCad official)

  • Symbol: DDC113TU-7-F
  • Footprint: Package_TO_SOT_SMD:SOT-363_SC-70-6
  • 3D model: SOT-363 (KiCad packages3D, STEP)
  • 3D model files: ddc113tu-7-f-etched.step / ddc113tu-7-f-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ddc113tu-7-f.step / ddc113tu-7-f.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (8 pp, sha256 734b84dde0b96a22, retrieved 2026-11-05, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF