component
DCX124EK-7-F
Public Made by Adomby adom
Diodes Incorporated Digital Transistors, SOT-26. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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DCX124EK-7-F
Diodes Incorporated · Digital Transistors · SOT-26
DCX124EK-7-F from Diodes Incorporated, in a SOT-26. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | E1 | passive | Emitter of transistor 1, pin 1 marked by the dot on the package; the datasheet states a 50V supply (VCC) and 30mA output current (IO) for the DCX124EK. |
| 2 | B1 | input | Base (input) of transistor 1 through built-in R1 = 22kΩ with R2 = 22kΩ, rated for VIN of -10 to +40V (NPN section) or +10 to -40V (PNP section). |
| 3 | C2 | passive | Collector (output) of transistor 2, with 50V VCC and 30mA IO limits for the DCX124EK. |
| 4 | E2 | passive | Emitter of transistor 2, with 50V VCC and 30mA IO limits for the DCX124EK. |
| 5 | B2 | input | Base (input) of transistor 2 through built-in R1 = 22kΩ with R2 = 22kΩ, rated for VIN of -10 to +40V (NPN section) or +10 to -40V (PNP section). |
| 6 | C1 | passive | Collector (output) of transistor 1, with 50V VCC and 30mA IO limits for the DCX124EK. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-26 |
| Category | Transistors/Thyristors |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input resistor R1 (nominal) | R1 | 22 | kΩ | 1 | |||
| Input resistor R2 (nominal) | R2 | 22 | kΩ | 1 | |||
| NPN Input Voltage (off) | Vl(off) | 0.5 | 1.1 | V | VCC = 5V, IO = 100μA | 3 | |
| NPN Input Voltage (on) | Vl(on) | 1.65 | 3 | V | VO = 0.3V, IO = 5mA | 3 | |
| NPN Output Voltage (on) | VO(on) | 0.1 | 0.3 | V | IO/Il = 10mA / 0.5mA | 3 | |
| NPN Input Current | Il | 0.36 | mA | VI = 5V | 3 | ||
| NPN Output Current (off) | IO(off) | 0.5 | µA | VCC = 50V, VI = 0V | 3 | ||
| NPN DC Current Gain | Gl | 80 | VO = 5V, IO = 5mA | 3 | |||
| NPN Input Resistor (R1) Tolerance | ∆R1 | -30 | 30 | % | 3 | ||
| NPN Resistance Ratio Tolerance | R2/R1 | -20 | 20 | % | 3 | ||
| PNP Input Voltage (off) | Vl(off) | -0.5 | -1.1 | V | VCC = -5V, IO = -100μA | 4 | |
| PNP Input Voltage (on) | Vl(on) | -1.9 | -3 | V | VO = -0.3V, IO = -5mA | 4 | |
| PNP Output Voltage (on) | VO(on) | -0.1 | -0.3 | V | IO/Il = -10mA /-0.5mA | 4 | |
| PNP Input Current | Il | -0.36 | mA | VI = -5V | 4 | ||
| PNP Output Current (off) | IO(off) | -0.5 | µA | VCC = 50V, VI = 0V | 4 | ||
| PNP DC Current Gain | Gl | 80 | VO = -5V, IO = -5mA | 4 | |||
| PNP Input Resistor (R1) Tolerance | ∆R1 | -30 | 30 | % | 4 | ||
| PNP Resistance Ratio Tolerance | R2/R1 | -20 | 20 | % | 4 | ||
| NPN Supply Voltage | VCC | 50 | V | @ TA = 25°C | 2 | ||
| NPN Input Voltage | VIN | -10 | 40 | V | @ TA = 25°C | 2 | |
| NPN Output Current | IO | 30 | mA | @ TA = 25°C | 2 | ||
| NPN Output Current All | IC(MAX) | 100 | mA | @ TA = 25°C | 2 | ||
| PNP Supply Voltage | VCC | 50 | V | @ TA = 25°C | 2 | ||
| PNP Input Voltage | VIN | -40 | 10 | V | @ TA = 25°C | 2 | |
| PNP Output Current | IO | -30 | mA | @ TA = 25°C | 2 | ||
| PNP Output Current All | IC(MAX) | -100 | mA | @ TA = 25°C | 2 | ||
| Power Dissipation (Total) | PD | 300 | mW | Note 5: FR-4 PC board, minimum recommended pad layout | 2 | ||
| Thermal Resistance, Junction to Ambient Air | RθJA | 417 | °C/W | Note 5: FR-4 PC board, minimum recommended pad layout | 2 | ||
| Operating and Storage Temperature Range | TJ, TSTG | -55 | 150 | °C | 2 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | • Terminals: Finish, Matte Tin Plated Leads, Solderable per MIL-STD-202, Method 208 | 1 |
CAD (KiCad official)
- Symbol:
DCX124EK-7-F - Footprint:
Package_TO_SOT_SMD:SOT-23-6 - 3D model: SOT-26 (KiCad packages3D, STEP)
- 3D model files:
dcx124ek-7-f-etched.step/dcx124ek-7-f-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dcx124ek-7-f.step/dcx124ek-7-f.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (13 pp, sha256
241e9a1b34f1d75b, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).