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DCX114EU-7-F

Diodes Incorporated · Digital Transistors · SOT-363

DCX114EU-7-F from Diodes Incorporated, in a SOT-363. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT1 (C1) output Output terminal of pre-biased transistor 1 (collector C1), rated for an output current of 50 mA in the NPN section and -50 mA in the PNP section of DCX114EU, with a supply voltage of 50 V.
2 IN2 (B2) input Input terminal of transistor 2 (base B2, through its built-in input resistor), with an absolute maximum input voltage of -10 V to +40 V in the NPN section and +10 V to -40 V in the PNP section.
3 COM2 (E2) passive Common terminal of transistor 2 (emitter E2), serving as the reference for the input and output of that transistor.
4 OUT2 (C2) output Output terminal of pre-biased transistor 2 (collector C2), rated for an output current of 50 mA in the NPN section and -50 mA in the PNP section of DCX114EU, with a supply voltage of 50 V.
5 IN1 (B1) input Input terminal of transistor 1 (base B1, through its built-in input resistor), with an absolute maximum input voltage of -10 V to +40 V in the NPN section and +10 V to -40 V in the PNP section.
6 COM1 (E1) passive Common terminal of transistor 1 (emitter E1), serving as the reference for the input and output of that transistor.

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SOT-363
Category Transistors/Thyristors
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage (NPN section) VO 50 V 3
Supply voltage (PNP section) VO 50 V 3
Input voltage (NPN section, DCX114EU) VI -10 40 V 3
Input voltage (PNP section, DCX114EU) VI -40 10 V 3
Output current (NPN section, DCX114EU) IO 50 mA 3
Output current (PNP section, DCX114EU) IO -50 mA 3
Peak output current (NPN section) ICM 100 mA 3
Peak output current (PNP section) ICM -100 mA 3
Power dissipation PD 200 mW Mounted on FR-4 PC board with minimum recommended pad layout 3
Input resistor R1 tolerance (NPN section) R1 -30 30 % 5
Input resistor R1 tolerance (PNP section) R1 -30 30 % 6
Resistance ratio tolerance R2/R1 (NPN section) R2/R1 -20 20 % 5
Resistance ratio tolerance R2/R1 (PNP section) R2/R1 -20 20 % 6
Input voltage (NPN section, DCX114EU) Vl(off) 0.5 1.1 V VCC = 5V, IO = 100μA 5
Input voltage (PNP section, DCX114EU) Vl(off) -0.5 -1.1 V VCC = -5V, IO = -100μA 6
Input voltage on (NPN section, DCX114EU) Vl(on) 1.9 3 V VO = 0.3V, IO = 10mA 5
Input voltage on (PNP section, DCX114EU) Vl(on) -1.9 -3 V VO = -0.3V, IO = -10mA 6
Output voltage (NPN section, DCX114EU) VO(on) 0.1 0.3 V IO/Il = 10mA / 0.5mA 5
Output voltage (PNP section, DCX114EU) VO(on) -0.1 -0.3 V IO/Il = -10mA / -0.5mA 6
Input current (NPN section, DCX114EU) Il 0.88 mA VI = 5V 5
Input current (PNP section, DCX114EU) Il -0.88 mA VI = -5V 6
Output current off (NPN section) IO(off) 0.5 μA VCC = 50V, VI = 0V 5
Output current off (PNP section) IO(off) -0.5 μA VCC = -50V, VI = 0V 6
DC current gain (NPN section, DCX114EU) Gl 30 VO = 5V, IO = 5mA 5
DC current gain (PNP section, DCX114EU) Gl 30 VO = -5V, IO = -5mA 6
Thermal resistance, junction to ambient RJA 625 °C/W Mounted on FR-4 PC board with minimum recommended pad layout 3
Operating and storage temperature range TJ, TSTG -55 150 °C 3
Input resistor R1 nominal (DCX114EU) R1 10 kΩ R1(NOM) 1
Input resistor R2 nominal (DCX114EU) R2 10 kΩ R2(NOM) 1

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin • Terminals: Finish, Matte Tin Plated Leads, Solderable per MIL-STD-202, Method 208 1

CAD (KiCad official)

  • Symbol: DCX114EU-7-F
  • Footprint: Package_TO_SOT_SMD:SOT-363_SC-70-6
  • 3D model: SOT-363 (KiCad packages3D, STEP)
  • 3D model files: dcx114eu-7-f-etched.step / dcx114eu-7-f-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dcx114eu-7-f.step / dcx114eu-7-f.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (14 pp, sha256 191dabd47d65778d, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF