component
DALC112S1RL
Public Made by Adomby adom
STMicroelectronics ESD And Surge Protection (TVS/ESD), SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+44@@ -0,0 +1,44 @@+# DALC112S1RL++**STMicroelectronics** · ESD And Surge Protection (TVS/ESD) · SOIC-8++DALC112S1RL from STMicroelectronics, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | I/O 5 | bidirectional | Signal line 5 protected by diode clamping pair to reference voltages with VRRM = 18V per diode and capacitance < 5pF. |+| 2 | I/O 6 | bidirectional | Signal line 6 protected by diode clamping pair to reference voltages with VRRM = 18V per diode and capacitance < 5pF. |+| 3 | I/O 1 | bidirectional | Signal line 1 protected by diode clamping pair to reference voltages with VRRM = 18V per diode and capacitance < 5pF. |+| 4 | I/O 2 | bidirectional | Signal line 2 protected by diode clamping pair to reference voltages with VRRM = 18V per diode and capacitance < 5pF. |+| 5 | I/O 3 | bidirectional | Signal line 3 protected by diode clamping pair to reference voltages with VRRM = 18V per diode and capacitance < 5pF. |+| 6 | I/O 4 | bidirectional | Signal line 4 protected by diode clamping pair to reference voltages with VRRM = 18V per diode and capacitance < 5pF. |+| 7 | REF 1 | power_in | Positive supply voltage reference connection for diode clamping, +VCC connected between REF1 and REF2. |+| 8 | REF 2 | power_in | Ground/negative supply reference connection for diode clamping, +VCC connected between REF1 and REF2. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | SOIC-8 |+| Category | Circuit Protection |+| Pins | 8 |++## CAD (KiCad official)++- Symbol: `DALC112S1RL`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8 (KiCad packages3D, STEP)+- 3D model files: `dalc112s1rl-etched.step` / `dalc112s1rl-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `dalc112s1rl.step` / `dalc112s1rl.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588939165002448896) (3 pp, sha256 `a7e89c8091e633cb`, retrieved 2026-09-23, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/dalc112s1rl-datasheet.pdf)
page.jsonadded+143@@ -0,0 +1,143 @@+{+ "slug": "dalc112s1rl",+ "version": "0.1.0",+ "type": "component",+ "description": "STMicroelectronics ESD And Surge Protection (TVS/ESD), SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "circuit protection",+ "dalc112s1rl",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "dalc112s1rl.kicad_sym",+ "dalc112s1rl.kicad_mod",+ "dalc112s1rl.glb",+ "dalc112s1rl.step",+ "dalc112s1rl.lbr",+ "docs/hero.png",+ "docs/dalc112s1rl-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "DALC112S1RL",+ "manufacturer": "STMicroelectronics",+ "package": "SOIC-8",+ "pin_count": 8,+ "category": "Circuit Protection",+ "subcategory": "ESD And Surge Protection (TVS/ESD)",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588939165002448896",+ "parts": {+ "symbol": "dalc112s1rl.kicad_sym",+ "footprint": "dalc112s1rl.kicad_mod",+ "model_3d": "dalc112s1rl-etched.glb",+ "model_3d_plain": "dalc112s1rl.glb",+ "model_3d_step": "dalc112s1rl-etched.step",+ "model_3d_step_plain": "dalc112s1rl.step",+ "lbr": "dalc112s1rl.lbr"+ },+ "distributor_links": {+ "lcsc": "C1973806"+ },+ "pins": [+ {+ "number": "1",+ "name": "I/O 5",+ "type": "bidirectional",+ "description": "Signal line 5 protected by diode clamping pair to reference voltages with VRRM = 18V per diode and capacitance < 5pF."+ },+ {+ "number": "2",+ "name": "I/O 6",+ "type": "bidirectional",+ "description": "Signal line 6 protected by diode clamping pair to reference voltages with VRRM = 18V per diode and capacitance < 5pF."+ },+ {+ "number": "3",+ "name": "I/O 1",+ "type": "bidirectional",+ "description": "Signal line 1 protected by diode clamping pair to reference voltages with VRRM = 18V per diode and capacitance < 5pF."+ },+ {+ "number": "4",+ "name": "I/O 2",+ "type": "bidirectional",+ "description": "Signal line 2 protected by diode clamping pair to reference voltages with VRRM = 18V per diode and capacitance < 5pF."+ },+ {+ "number": "5",+ "name": "I/O 3",+ "type": "bidirectional",+ "description": "Signal line 3 protected by diode clamping pair to reference voltages with VRRM = 18V per diode and capacitance < 5pF."+ },+ {+ "number": "6",+ "name": "I/O 4",+ "type": "bidirectional",+ "description": "Signal line 4 protected by diode clamping pair to reference voltages with VRRM = 18V per diode and capacitance < 5pF."+ },+ {+ "number": "7",+ "name": "REF 1",+ "type": "power_in",+ "description": "Positive supply voltage reference connection for diode clamping, +VCC connected between REF1 and REF2."+ },+ {+ "number": "8",+ "name": "REF 2",+ "type": "power_in",+ "description": "Ground/negative supply reference connection for diode clamping, +VCC connected between REF1 and REF2."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.2",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.2",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Explicit pin-to-signal mapping not shown in datasheet text - The pinout diagram that should appear o"+ ],+ "pages_sent": 3,+ "cost_usd": 0.1026,+ "at": "2026-09-23T04:20:20"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588939165002448896",+ "pages": 3,+ "sha256": "a7e89c8091e633cb",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 8,+ "described": 8,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}