component
DAC902U
Public Made by Adomby adom
Texas Instruments Digital To Analog Converters (DACs), SOIC-28-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
DAC902U
Texas Instruments · Digital To Analog Converters (DACs) · SOIC-28-300mil
DAC902U from Texas Instruments, in a SOIC-28-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Bit 1 (D11) | input | Data bit 1 (D11), the MSB of the 12-bit data input. |
| 2 | Bit 2 (D10) | input | Data bit 2 (D10) of the 12-bit data input. |
| 3 | Bit 3 (D9) | input | Data bit 3 (D9) of the 12-bit data input. |
| 4 | Bit 4 (D8) | input | Data bit 4 (D8) of the 12-bit data input. |
| 5 | Bit 5 (D7) | input | Data bit 5 (D7) of the 12-bit data input. |
| 6 | Bit 6 (D6) | input | Data bit 6 (D6) of the 12-bit data input. |
| 7 | Bit 7 (D5) | input | Data bit 7 (D5) of the 12-bit data input. |
| 8 | Bit 8 (D4) | input | Data bit 8 (D4) of the 12-bit data input. |
| 9 | Bit 9 (D3) | input | Data bit 9 (D3) of the 12-bit data input. |
| 10 | Bit 10 (D2) | input | Data bit 10 (D2) of the 12-bit data input. |
| 11 | Bit 11 (D1) | input | Data bit 11 (D1) of the 12-bit data input. |
| 12 | Bit 12 (D0) | input | Data bit 12 (D0), the LSB of the 12-bit data input. |
| 13 | NC | unconnected | No connection. |
| 14 | NC | unconnected | No connection. |
| 15 | PD | input | Power-down control input, active HIGH, with an internal pull-down circuit; may be left unconnected if not used. |
| 16 | INT/EXT | input | Reference select pin: internal (=0) or external (=1) reference operation. |
| 17 | REFIN | bidirectional | Reference input/output; see the Applications section of the datasheet for details. |
| 18 | FSA | input | Full-scale output adjust; one external resistor sets the full-scale current over 2mA to 20mA. |
| 19 | BW | passive | Bandwidth/noise reduction pin; bypass with 0.1µF to +VA for optimum performance. |
| 20 | AGND | power_in | Analog ground. |
| 21 | ~{IOUT} | output | Complementary DAC current output (the datasheet's overbarred IOUT). |
| 22 | IOUT | output | DAC current output. |
| 23 | BYP | passive | Bypass node; use 0.1µF to AGND. |
| 24 | +VA | power_in | Analog supply voltage, 2.7V to 5.5V. |
| 25 | NC | unconnected | No connection. |
| 26 | DGND | power_in | Digital ground. |
| 27 | +VD | power_in | Digital supply voltage, 2.7V to 5.5V. |
| 28 | CLK | input | Clock input; data is latched on the rising edge of the clock. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-28-300mil |
| Category | Data Converters |
| Pins | 28 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Differential Nonlinearity | DNL | -1.75 | 0.5 | 1.75 | LSB | TA=+25°C, fCLOCK=25MSPS, fOUT=1.0MHz | 2 |
| Integral Nonlinearity | INL | -2.5 | 1 | 2.5 | LSB | TA=+25°C, fCLOCK=25MSPS, fOUT=1.0MHz | 2 |
| SFDR to Nyquist | SFDR | 71 | 77 | dBc | fOUT=1MHz, fCLOCK=25MSPS, TA=+25°C | 2 | |
| Gain Error, Internal Reference | -10 | 1 | 10 | %FSR | With Internal Reference | 3 | |
| Gain Error, External Reference | -10 | 2 | 10 | %FSR | With External Reference | 3 | |
| Offset Error | -0.025 | 0.025 | %FSR | With Internal Reference | 3 | ||
| Power-Supply Rejection, +VA | -0.2 | 0.2 | %FSR/V | 3 | |||
| Power-Supply Rejection, +VD | -0.025 | 0.025 | %FSR/V | 3 | |||
| Output Compliance Range | -1 | 1.25 | V | 3 | |||
| Full-Scale Output Range | FSR | 2 | 20 | mA | All Bits High, IOUT | 3 | |
| Reference Input Compliance Range | 0.1 | 1.25 | V | 3 | |||
| Logic High Voltage, VIH | VIH | 3.5 | 5 | V | +VD = +5V | 3 | |
| Logic Low Voltage, VIL | VIL | 0 | 1.2 | V | +VD = +5V | 3 | |
| Logic High Voltage, VIH | VIH | 2 | 3 | V | +VD = +3V | 3 | |
| Logic Low Voltage, VIL | VIL | 0 | 0.8 | V | +VD = +3V | 3 | |
| Logic High Current | IIH | -20 | 20 | µA | +VD = +5V | 3 | |
| Logic Low Current | IIL | -20 | 20 | µA | +VD = +5V | 3 | |
| Analog Supply Voltage | +VA | 2.7 | 5 | 5.5 | V | 3 | |
| Digital Supply Voltage | +VD | 2.7 | 5 | 5.5 | V | 3 | |
| Supply Current IVA | IVA | 24 | 30 | mA | fCLOCK=50MSPS, fOUT=1.0MHz | 3 | |
| Supply Current IVA, Power-Down Mode | IVA | 1.1 | 2 | mA | 3 | ||
| Supply Current IVD | IVD | 8 | 15 | mA | fCLOCK=50MSPS, fOUT=1.0MHz | 3 | |
| Power Dissipation | 170 | 230 | mW | +5V, IOUT = 20mA | 3 | ||
| Output Update Rate | fCLOCK | 165 | 200 | MSPS | 4.5V to 5.5V | 2 | |
| Output Update Rate | fCLOCK | 125 | 165 | MSPS | 2.7V to 3.3V | 2 | |
| Operating Ambient Temperature | TA | -40 | 85 | °C | Full Specified Temperature Range | 2 | |
| Clock Pulse HIGH Time | t1 | 3 | ns | 5 | |||
| Clock Pulse LOW Time | t2 | 3 | ns | 5 | |||
| Data Setup Time | tS | 1 | ns | 5 | |||
| Data Hold Time | tH | 1.5 | ns | 5 | |||
| +VA to AGND | +VA | -0.3 | 6 | V | 2 | ||
| +VD to DGND | +VD | -0.3 | 6 | V | 2 | ||
| AGND to DGND | -0.3 | 0.3 | V | 2 | |||
| +VA to +VD | -6 | 6 | V | 2 | |||
| CLK, PD to DGND | -0.3 | V | max VD + 0.3V | 2 | |||
| D0-D11 to DGND | -0.3 | V | max VD + 0.3V | 2 | |||
| IOUT, IOUT to AGND | -1 | V | max VA + 0.3V | 2 | |||
| BW, BYP, REFIN, FSA, INT/EXT to AGND | -0.3 | V | max VA + 0.3V | 2 | |||
| Junction Temperature | TJ | 150 | °C | 2 | |||
| Case Temperature | 100 | °C | 2 | ||||
| Storage Temperature | Tstg | 125 | °C | 2 | |||
| Thermal Resistance, SO-28 | θJA | 75 | °C/W | SO-28 | 3 | ||
| Gain Drift With Internal Reference | 120 | ppmFSR/°C | ±120 | 3 | |||
| Reference Voltage | 1.24 | V | 3 | ||||
| Reference Tolerance | -5 | 5 | % | 3 | |||
| Reference Voltage Drift | -50 | 50 | ppmFSR/°C | 3 | |||
| Power Dissipation, Power-Down Mode | 45 | mW | 3 |
CAD (KiCad official)
- Symbol:
DAC902U - Footprint:
Package_SO:SOIC-28W_7.5x17.9mm_P1.27mm - 3D model: SOIC-28-300mil (KiCad packages3D, STEP)
- 3D model files:
dac902u-etched.step/dac902u-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dac902u.step/dac902u.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (26 pp, sha256
6db60c11e6789c94, retrieved 2026-10-31, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).