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Name	Last commit message	Last updated
docs	dac8812icpwr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	3d ago
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dac8812icpwr-etched.fit.json	dac8812icpwr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	3d ago
dac8812icpwr-etched.glb	dac8812icpwr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	3d ago
dac8812icpwr-etched.step	dac8812icpwr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	3d ago
dac8812icpwr.glb	Publish 0.1.0 · Ray	4d ago
dac8812icpwr.kicad_mod	Publish 0.1.0 · Ray	4d ago
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README.md	Initial commit: component/dac8812icpwr · Ray	4d ago

DAC8812ICPWR

Texas Instruments · Digital To Analog Converters (DAC) · TSSOP-16

DAC8812ICPWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	RFBA	input	Establish voltage output for DAC A by connecting to external amplifier output.
2	VREFA	input	DAC A reference voltage input pin that establishes full-scale output voltage and can be tied to VDD.
3	IOUTA	output	DAC A current output.
4	AGNDA	power_in	DAC A analog ground.
5	AGNDB	power_in	DAC B analog ground.
6	IOUTB	output	DAC B current output.
7	VREFB	input	DAC B reference voltage input pin that establishes full-scale output voltage and can be tied to VDD.
8	RFBB	input	Establish voltage output for DAC B by connecting to external amplifier output.
9	SDI	input	Serial data input that loads directly into the shift register.
10	RS	input	Active-low reset input that sets input and DAC registers to all 0s or midscale depending on MSB pin state.
11	CS	input	Active-low chip-select input that disables shift register loading when high and transfers serial register data to input register when going high.
12	DGND	power_in	Digital ground.
13	VDD	power_in	Positive power-supply input with specified operation range 2.7 V to 5.5 V.
14	MSB	input	MSB input that determines output reset value to either 0 or midscale during reset or power-on and can be permanently tied to ground or VDD.
15	LDAC	input	Active-low load DAC register strobe input that asynchronously transfers all input register data to the DAC registers.
16	CLK	input	Clock input that loads data into shift register on positive edge.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	TSSOP-16
Category	Data Acquisition
Pins	16

CAD (KiCad official)

Symbol: DAC8812ICPWR
Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
3D model: TSSOP-16 (KiCad packages3D, STEP)
3D model files: dac8812icpwr-etched.step / dac8812icpwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dac8812icpwr.step / dac8812icpwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (31 pp, sha256 9dbcadd66987cdcc, retrieved 2026-10-01, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF