component
DAC8812IBPWR
Public Made by Adomby adom
Texas Instruments Digital To Analog Converters (DAC), TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownDAC8812IBPWR
Texas Instruments · Digital To Analog Converters (DAC) · TSSOP-16
DAC8812IBPWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RFBA | input | Feedback resistor connection for DAC A that establishes the voltage output for DAC A when connected to the external amplifier output. |
| 2 | VREFA | input | DAC A reference voltage input that establishes the DAC A full-scale output voltage and can be tied to VDD. |
| 3 | IOUTA | output | DAC A current output. |
| 4 | AGNDA | power_in | DAC A analog ground. |
| 5 | AGNDB | power_in | DAC B analog ground. |
| 6 | IOUTB | output | DAC B current output. |
| 7 | VREFB | input | DAC B reference voltage input that establishes the DAC B full-scale output voltage and can be tied to VDD. |
| 8 | RFBB | input | Feedback resistor connection for DAC B that establishes the voltage output for DAC B when connected to the external amplifier output. |
| 9 | SDI | input | Serial data input; data loads directly into the shift register. |
| 10 | RS | input | Active-low reset that sets the input and DAC registers to all 0s or midscale, with register data 0x0000 when MSB = 0 and 0x8000 when MSB = 1 for the DAC8812. |
| 11 | CS | input | Active-low chip select that disables shift register loading when high and transfers serial register data to the input register when CS goes high, without affecting LDAC operation. |
| 12 | DGND | power_in | Digital ground. |
| 13 | VDD | power_in | Positive power-supply input with a specified range of operation of 2.7 V to 5.5 V. |
| 14 | MSB | input | Sets the output to zero scale when MSB = 0 or midscale when MSB = 1 during a RESET pulse or at power-on; can be permanently tied to ground or VDD. |
| 15 | LDAC | input | Level-sensitive, active-low asynchronous load DAC strobe that transfers all input register data to the DAC registers. |
| 16 | CLK | input | Clock input; the positive edge clocks data into the shift register. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-16 |
| Category | Data Acquisition |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
DAC8812IBPWR - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files:
dac8812ibpwr-etched.step/dac8812ibpwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dac8812ibpwr.step/dac8812ibpwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (31 pp, sha256
9dbcadd66987cdcc, retrieved 2026-10-11, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).