DAC8568IDPWR

{
  "slug": "dac8568idpwr",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments Digital To Analog Converters (DAC), TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "data acquisition",
    "dac8568idpwr",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "dac8568idpwr.kicad_sym",
    "dac8568idpwr.kicad_mod",
    "dac8568idpwr.glb",
    "dac8568idpwr.step",
    "dac8568idpwr.lbr",
    "docs/hero.png",
    "docs/dac8568idpwr-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "dac8568idpwr-hero.glb",
    "dac8568idpwr-hero.overlay.json",
    "dac8568idpwr-etched.glb"
  ],
  "component": {
    "mpn": "DAC8568IDPWR",
    "manufacturer": "Texas Instruments",
    "package": "TSSOP-16",
    "pin_count": 16,
    "category": "Data Acquisition",
    "subcategory": "Digital To Analog Converters (DAC)",
    "datasheet": "https://www.ti.com/lit/ds/symlink/dac8568.pdf",
    "parts": {
      "symbol": "dac8568idpwr.kicad_sym",
      "footprint": "dac8568idpwr.kicad_mod",
      "model_3d": "dac8568idpwr-hero.glb",
      "model_3d_plain": "dac8568idpwr-etched.glb",
      "model_3d_step": "dac8568idpwr-etched.step",
      "model_3d_step_plain": "dac8568idpwr.step",
      "lbr": "dac8568idpwr.lbr"
    },
    "distributor_links": {
      "lcsc": "C2870002",
      "digikey": "DAC8568IDPWR-ND",
      "mouser": "595-DAC8568IDPWR"
    },
    "distributor_check": {
      "checked_at": "2026-11-10T07:17:35Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "DAC8568IDPWR-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "595-DAC8568IDPWR",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "LDAC",
        "type": "input",
        "description": "Load DACs input; it is a negative-edge triggered signal for simultaneous DAC updates in asynchronous mode, and must be connected to GND permanently when using synchronous update mode."
      },
      {
        "number": "2",
        "name": "SYNC",
        "type": "input",
        "description": "Active-low, level-triggered Schmitt-trigger frame synchronization input that enables the input shift register, with the DAC output updating after the 32nd SCLK falling edge and a SYNC rising edge before the 31st clock edge aborting the write."
      },
      {
        "number": "3",
        "name": "AVDD",
        "type": "power_in",
        "description": "Power-supply input, 2.7 V to 5.5 V."
      },
      {
        "number": "4",
        "name": "VOUTA",
        "type": "output",
        "description": "Analog output voltage from DAC A."
      },
      {
        "number": "5",
        "name": "VOUTC",
        "type": "output",
        "description": "Analog output voltage from DAC C."
      },
      {
        "number": "6",
        "name": "VOUTE",
        "type": "output",
        "description": "Analog output voltage from DAC E."
      },
      {
        "number": "7",
        "name": "VOUTG",
        "type": "output",
        "description": "Analog output voltage from DAC G."
      },
      {
        "number": "8",
        "name": "VREFIN/VREFOUT",
        "type": "bidirectional",
        "description": "Positive reference input or reference output, which is 2.5 V when the internal reference is used; external VREFIN maximum is AVDD for grades A and B and AVDD/2 for grades C and D."
      },
      {
        "number": "9",
        "name": "CLR",
        "type": "input",
        "description": "Asynchronous, falling-edge triggered clear input that clears all DAC registers and buffers to the clear code, with a minimum low pulse width of 80 ns."
      },
      {
        "number": "10",
        "name": "VOUTH",
        "type": "output",
        "description": "Analog output voltage from DAC H."
      },
      {
        "number": "11",
        "name": "VOUTF",
        "type": "output",
        "description": "Analog output voltage from DAC F."
      },
      {
        "number": "12",
        "name": "VOUTD",
        "type": "output",
        "description": "Analog output voltage from DAC D."
      },
      {
        "number": "13",
        "name": "VOUTB",
        "type": "output",
        "description": "Analog output voltage from DAC B."
      },
      {
        "number": "14",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference point for all circuitry on the device."
      },
      {
        "number": "15",
        "name": "DIN",
        "type": "input",
        "description": "Serial data input clocked into the 32-bit input shift register on each SCLK falling edge; Schmitt-trigger logic input."
      },
      {
        "number": "16",
        "name": "SCLK",
        "type": "input",
        "description": "Serial clock input supporting data transfer rates up to 50 MHz; Schmitt-trigger logic input."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Pin 8 is listed as VREFIN/VREFOUT and acts as both reference input and reference output; the ERC typ; LDAC (pin 1) and CLR (pin 9) are present only in the 16-pin package; their pin numbers are taken fro; Package mapping: the datasheet's PW 16-pin pinout applies to DAC8568IDPWR, which the package addendu"
        ],
        "pages_sent": 72,
        "cost_usd": 0.3274,
        "at": "2026-11-10T07:17:24"
      },
      "datasheet": {
        "url": "https://www.ti.com/lit/ds/symlink/dac8568.pdf",
        "pages": 72,
        "sha256": "d1ab4f63d58b4e3b",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "dac8568idpwr.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          5.0,
          1.1
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "6ad5e98224d02a427d9a6b929a28dbc158b9925fba5adec12db05079f1016948",
        "checked": "2026-11-10",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "dac8568idpwr-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          5.0,
          1.1
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "52282774e647fb6c9bae943d372e59e05a18bc049451d53fa9bdb347a81b85d2",
        "checked": "2026-11-10",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ],
    "package_dims": {
      "package_code": "PW0016A",
      "source_page": 69,
      "D": {
        "nom_mm": 5.0,
        "range_mm": [
          4.9,
          5.1
        ]
      },
      "E1": {
        "nom_mm": 4.4,
        "range_mm": [
          4.3,
          4.5
        ]
      },
      "E": {
        "nom_mm": 6.4,
        "range_mm": [
          6.2,
          6.6
        ]
      },
      "e": {
        "nom_mm": 0.65,
        "range_mm": [
          null,
          null
        ]
      },
      "A": {
        "nom_mm": 1.2,
        "range_mm": [
          null,
          1.2
        ]
      },
      "source": "datasheet package drawing, every number found on its page (extract_pins --task dims)",
      "model_check": {
        "file": "dac8568idpwr.step",
        "verdict": "PASS",
        "reasons": [
          "height and body within the datasheet's package drawing"
        ],
        "by": "factory/package_fit.py"
      }
    }
  }
}