component
DAC8565IAPWR
Public Made by Adomby adom
Texas Instruments Digital To Analog Converters (DAC), TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+52@@ -0,0 +1,52 @@+# DAC8565IAPWR++**Texas Instruments** · Digital To Analog Converters (DAC) · TSSOP-16++DAC8565IAPWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VOUTA | output | Analog output voltage from DAC A. |+| 2 | VOUTB | output | Analog output voltage from DAC B. |+| 3 | VREFH/VREFOUT | bidirectional | Positive reference input or 2.5V reference output when internal reference is used; sources up to 20mA. |+| 4 | AVDD | power_in | Power-supply input, 2.7V to 5.5V. |+| 5 | VREFL | input | Negative reference input, 0V to AVDD/2V. |+| 6 | GND | power_in | Ground reference point. |+| 7 | VOUTC | output | Analog output voltage from DAC C. |+| 8 | VOUTD | output | Analog output voltage from DAC D. |+| 9 | SYNC | input | Active-low frame synchronization input with Schmitt-Trigger logic; enables shift register when low, acts as interrupt if raised before 24th SCLK edge. |+| 10 | SCLK | input | Serial clock input with Schmitt-Trigger logic; data transferred on falling edges at rates up to 50MHz. |+| 11 | DIN | input | Serial data input with Schmitt-Trigger logic clocked into 24-bit shift register on falling SCLK edges. |+| 12 | IOVDD | power_in | Digital input-output power supply, 1.8V to 5.5V. |+| 13 | RST | input | Asynchronous active-low reset input resetting all DAC channels to zero-scale or midscale per RSTSEL state. |+| 14 | RSTSEL | input | Reset select input determining reset destination (zero-scale if low, midscale if high) and input coding mode (binary if low, two's complement if high). |+| 15 | ENABLE | input | Active-low control input enabling the SPI interface. |+| 16 | LDAC | input | Rising edge-triggered load input updating all DAC output registers simultaneously. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | TSSOP-16 |+| Category | Data Acquisition |+| Pins | 16 |++## CAD (KiCad official)++- Symbol: `DAC8565IAPWR`+- Footprint: `Package_SO:TSSOP-16_4.4x5mm_P0.65mm`+- 3D model: TSSOP-16 (KiCad packages3D, STEP)+- 3D model files: `dac8565iapwr-etched.step` / `dac8565iapwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `dac8565iapwr.step` / `dac8565iapwr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/dac8565) (51 pp, sha256 `41885742ee83df2e`, retrieved 2026-09-22, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/dac8565iapwr-datasheet.pdf)
page.jsonadded+189@@ -0,0 +1,189 @@+{+ "slug": "dac8565iapwr",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Digital To Analog Converters (DAC), TSSOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "data acquisition",+ "dac8565iapwr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "dac8565iapwr.kicad_sym",+ "dac8565iapwr.kicad_mod",+ "dac8565iapwr.glb",+ "dac8565iapwr.step",+ "dac8565iapwr.lbr",+ "docs/hero.png",+ "docs/dac8565iapwr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "DAC8565IAPWR",+ "manufacturer": "Texas Instruments",+ "package": "TSSOP-16",+ "pin_count": 16,+ "category": "Data Acquisition",+ "subcategory": "Digital To Analog Converters (DAC)",+ "datasheet": "https://www.ti.com/cn/lit/gpn/dac8565",+ "parts": {+ "symbol": "dac8565iapwr.kicad_sym",+ "footprint": "dac8565iapwr.kicad_mod",+ "model_3d": "dac8565iapwr-etched.glb",+ "model_3d_plain": "dac8565iapwr.glb",+ "model_3d_step": "dac8565iapwr-etched.step",+ "model_3d_step_plain": "dac8565iapwr.step",+ "lbr": "dac8565iapwr.lbr"+ },+ "distributor_links": {+ "lcsc": "C69596"+ },+ "pins": [+ {+ "number": "1",+ "name": "VOUTA",+ "type": "output",+ "description": "Analog output voltage from DAC A."+ },+ {+ "number": "2",+ "name": "VOUTB",+ "type": "output",+ "description": "Analog output voltage from DAC B."+ },+ {+ "number": "3",+ "name": "VREFH/VREFOUT",+ "type": "bidirectional",+ "description": "Positive reference input or 2.5V reference output when internal reference is used; sources up to 20mA."+ },+ {+ "number": "4",+ "name": "AVDD",+ "type": "power_in",+ "description": "Power-supply input, 2.7V to 5.5V."+ },+ {+ "number": "5",+ "name": "VREFL",+ "type": "input",+ "description": "Negative reference input, 0V to AVDD/2V."+ },+ {+ "number": "6",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference point."+ },+ {+ "number": "7",+ "name": "VOUTC",+ "type": "output",+ "description": "Analog output voltage from DAC C."+ },+ {+ "number": "8",+ "name": "VOUTD",+ "type": "output",+ "description": "Analog output voltage from DAC D."+ },+ {+ "number": "9",+ "name": "SYNC",+ "type": "input",+ "description": "Active-low frame synchronization input with Schmitt-Trigger logic; enables shift register when low, acts as interrupt if raised before 24th SCLK edge."+ },+ {+ "number": "10",+ "name": "SCLK",+ "type": "input",+ "description": "Serial clock input with Schmitt-Trigger logic; data transferred on falling edges at rates up to 50MHz."+ },+ {+ "number": "11",+ "name": "DIN",+ "type": "input",+ "description": "Serial data input with Schmitt-Trigger logic clocked into 24-bit shift register on falling SCLK edges."+ },+ {+ "number": "12",+ "name": "IOVDD",+ "type": "power_in",+ "description": "Digital input-output power supply, 1.8V to 5.5V."+ },+ {+ "number": "13",+ "name": "RST",+ "type": "input",+ "description": "Asynchronous active-low reset input resetting all DAC channels to zero-scale or midscale per RSTSEL state."+ },+ {+ "number": "14",+ "name": "RSTSEL",+ "type": "input",+ "description": "Reset select input determining reset destination (zero-scale if low, midscale if high) and input coding mode (binary if low, two's complement if high)."+ },+ {+ "number": "15",+ "name": "ENABLE",+ "type": "input",+ "description": "Active-low control input enabling the SPI interface."+ },+ {+ "number": "16",+ "name": "LDAC",+ "type": "input",+ "description": "Rising edge-triggered load input updating all DAC output registers simultaneously."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.2",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.2",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-4-6",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [],+ "pages_sent": 51,+ "cost_usd": 0.4714,+ "at": "2026-09-22T01:05:31"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/dac8565",+ "pages": 51,+ "sha256": "41885742ee83df2e",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 16,+ "described": 16,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}