DAC8562TDGST

{
  "slug": "dac8562tdgst",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments Digital To Analog Converters (DAC), VSSOP-10-0.5mm. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
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    "data acquisition",
    "dac8562tdgst",
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    "dac8562tdgst.step",
    "dac8562tdgst.lbr",
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  "component": {
    "mpn": "DAC8562TDGST",
    "manufacturer": "Texas Instruments",
    "package": "VSSOP-10-0.5mm",
    "pin_count": 10,
    "category": "Data Acquisition",
    "subcategory": "Digital To Analog Converters (DAC)",
    "datasheet": "https://www.ti.com/cn/lit/gpn/dac8162t",
    "parts": {
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      "lbr": "dac8562tdgst.lbr"
    },
    "distributor_links": {
      "lcsc": 2679491,
      "digikey": "296-43693-2-ND",
      "mouser": "595-DAC8562TDGST"
    },
    "distributor_check": {
      "checked_at": "2026-10-03T03:51:52Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "296-43693-2-ND",
        "status": "found"
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        "pn": "595-DAC8562TDGST",
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    },
    "pins": [
      {
        "number": "1",
        "name": "VOUTA",
        "type": "output",
        "description": "Analog output voltage from DAC-A"
      },
      {
        "number": "2",
        "name": "VOUTB",
        "type": "output",
        "description": "Analog output voltage from DAC-B"
      },
      {
        "number": "3",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference point for all circuitry on the device"
      },
      {
        "number": "4",
        "name": "LDAC",
        "type": "input",
        "description": "Negative edge-triggered timing signal for simultaneous DAC updates in asynchronous mode; must be connected to GND or held low before sending commands in synchronous mode"
      },
      {
        "number": "5",
        "name": "CLR",
        "type": "input",
        "description": "Falling-edge-sensitive asynchronous clear input; loads zero scale (DACxx62T) or mid-scale (DACxx63T) to all input and DAC registers"
      },
      {
        "number": "6",
        "name": "SYNC",
        "type": "input",
        "description": "Level-triggered active-low frame synchronization signal for input data; Schmitt-trigger logic input"
      },
      {
        "number": "7",
        "name": "SCLK",
        "type": "input",
        "description": "Serial clock input for data transfer up to 50 MHz; Schmitt-trigger logic input"
      },
      {
        "number": "8",
        "name": "DIN",
        "type": "input",
        "description": "Serial data input clocked into 24-bit shift register on each falling edge of SCLK; Schmitt-trigger logic input"
      },
      {
        "number": "9",
        "name": "AVDD",
        "type": "power_in",
        "description": "Power-supply input voltage from 2.7 V to 5.5 V"
      },
      {
        "number": "10",
        "name": "VREFIN/VREFOUT",
        "type": "bidirectional",
        "description": "Bidirectional voltage reference pin; provides 2.5-V output when internal reference is used or accepts external reference input"
      }
    ],
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        "factory": "2.0.0",
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        "primary_model": "claude-haiku-4-5-20251001",
        "primary_mode": "text",
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        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [],
        "pages_sent": 13,
        "cost_usd": 0.115,
        "at": "2026-10-03T03:51:29"
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      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/dac8162t",
        "pages": 63,
        "sha256": "c924f9150c60d73e",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 10,
        "described": 10,
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        "refuses_to_fabricate": true
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