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DAC8562SDGSR
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Texas Instruments Digital To Analog Converters (DAC), VSSOP-10-0.5mm. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+46@@ -0,0 +1,46 @@+# DAC8562SDGSR++**Texas Instruments** · Digital To Analog Converters (DAC) · VSSOP-10-0.5mm++DAC8562SDGSR from Texas Instruments, in a VSSOP-10-0.5mm. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VOUTA | output | Analog output voltage from DAC-A with full-scale range of 2.5 V or 5 V depending on configuration. |+| 2 | VOUTB | output | Analog output voltage from DAC-B with full-scale range of 2.5 V or 5 V depending on configuration. |+| 3 | GND | power_in | Ground reference point for all circuitry on the device. |+| 4 | LDAC | input | Negative edge-triggered signal for simultaneous DAC updates in asynchronous mode; must be connected to GND permanently or held low in synchronous mode. |+| 5 | CLR | input | Falling-edge sensitive asynchronous clear input that loads zero scale to DAC8562 or mid-scale to DACxx63 registers, exiting clear mode on the 24th falling edge of the next write. |+| 6 | SYNC | input | Active-low level-triggered frame synchronization signal enabling the input shift register with DAC output update on the 24th clock falling edge; rising edge before the 23rd clock acts as write interrupt. |+| 7 | SCLK | input | Serial clock input with Schmitt-trigger logic supporting data transfer rates up to 50 MHz. |+| 8 | DIN | input | Serial data input with Schmitt-trigger logic that clocks data into the 24-bit input shift register on each falling edge of SCLK. |+| 9 | AVDD | power_in | Power-supply input voltage with operating range from 2.7 V to 5.5 V. |+| 10 | VREFIN/VREFOUT | bidirectional | Bidirectional voltage reference pin that outputs 2.5 V when internal reference is used, can source or sink up to 20 mA, with initial accuracy of ±5 mV and temperature drift of 4-ppm/°C. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | VSSOP-10-0.5mm |+| Category | Data Acquisition |+| Pins | 10 |++## CAD (KiCad official)++- Symbol: `DAC8562SDGSR`+- Footprint: `Package_SO:MSOP-10_3x3mm_P0.5mm`+- 3D model: VSSOP-10-0.5mm (KiCad packages3D, STEP)+- 3D model files: `dac8562sdgsr-etched.step` / `dac8562sdgsr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `dac8562sdgsr.step` / `dac8562sdgsr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/dac8562) (63 pp, sha256 `3fbba20baac4cf7e`, retrieved 2026-10-03, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/dac8562sdgsr-datasheet.pdf)
page.jsonadded+169@@ -0,0 +1,169 @@+{+ "slug": "dac8562sdgsr",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Digital To Analog Converters (DAC), VSSOP-10-0.5mm. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "data acquisition",+ "dac8562sdgsr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "dac8562sdgsr.kicad_sym",+ "dac8562sdgsr.kicad_mod",+ "dac8562sdgsr.glb",+ "dac8562sdgsr.step",+ "dac8562sdgsr.lbr",+ "docs/hero.png",+ "docs/dac8562sdgsr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "dac8562sdgsr-hero.glb",+ "dac8562sdgsr-hero.overlay.json"+ ],+ "component": {+ "mpn": "DAC8562SDGSR",+ "manufacturer": "Texas Instruments",+ "package": "VSSOP-10-0.5mm",+ "pin_count": 10,+ "category": "Data Acquisition",+ "subcategory": "Digital To Analog Converters (DAC)",+ "datasheet": "https://www.ti.com/cn/lit/gpn/dac8562",+ "parts": {+ "symbol": "dac8562sdgsr.kicad_sym",+ "footprint": "dac8562sdgsr.kicad_mod",+ "model_3d": "dac8562sdgsr-hero.glb",+ "model_3d_plain": "dac8562sdgsr.glb",+ "model_3d_step": "dac8562sdgsr-etched.step",+ "model_3d_step_plain": "dac8562sdgsr.step",+ "lbr": "dac8562sdgsr.lbr"+ },+ "distributor_links": {+ "lcsc": 127965,+ "digikey": "296-29030-2-ND",+ "mouser": "595-DAC8562SDGSR"+ },+ "distributor_check": {+ "checked_at": "2026-10-03T00:44:45Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-29030-2-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "595-DAC8562SDGSR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "VOUTA",+ "type": "output",+ "description": "Analog output voltage from DAC-A with full-scale range of 2.5 V or 5 V depending on configuration."+ },+ {+ "number": "2",+ "name": "VOUTB",+ "type": "output",+ "description": "Analog output voltage from DAC-B with full-scale range of 2.5 V or 5 V depending on configuration."+ },+ {+ "number": "3",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference point for all circuitry on the device."+ },+ {+ "number": "4",+ "name": "LDAC",+ "type": "input",+ "description": "Negative edge-triggered signal for simultaneous DAC updates in asynchronous mode; must be connected to GND permanently or held low in synchronous mode."+ },+ {+ "number": "5",+ "name": "CLR",+ "type": "input",+ "description": "Falling-edge sensitive asynchronous clear input that loads zero scale to DAC8562 or mid-scale to DACxx63 registers, exiting clear mode on the 24th falling edge of the next write."+ },+ {+ "number": "6",+ "name": "SYNC",+ "type": "input",+ "description": "Active-low level-triggered frame synchronization signal enabling the input shift register with DAC output update on the 24th clock falling edge; rising edge before the 23rd clock acts as write interrupt."+ },+ {+ "number": "7",+ "name": "SCLK",+ "type": "input",+ "description": "Serial clock input with Schmitt-trigger logic supporting data transfer rates up to 50 MHz."+ },+ {+ "number": "8",+ "name": "DIN",+ "type": "input",+ "description": "Serial data input with Schmitt-trigger logic that clocks data into the 24-bit input shift register on each falling edge of SCLK."+ },+ {+ "number": "9",+ "name": "AVDD",+ "type": "power_in",+ "description": "Power-supply input voltage with operating range from 2.7 V to 5.5 V."+ },+ {+ "number": "10",+ "name": "VREFIN/VREFOUT",+ "type": "bidirectional",+ "description": "Bidirectional voltage reference pin that outputs 2.5 V when internal reference is used, can source or sink up to 20 mA, with initial accuracy of ±5 mV and temperature drift of 4-ppm/°C."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [],+ "pages_sent": 13,+ "cost_usd": 0.1304,+ "at": "2026-10-03T00:44:18"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/dac8562",+ "pages": 63,+ "sha256": "3fbba20baac4cf7e",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 10,+ "described": 10,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}