Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

DAC8554IPW

Texas Instruments · Digital To Analog Converters (DAC) · TSSOP-16

DAC8554IPW from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VOUTA output Analog output voltage from DAC A, swinging rail-to-rail over the 2.7V to 5.5V supply range.
2 VOUTB output Analog output voltage from DAC B, swinging rail-to-rail over the 2.7V to 5.5V supply range.
3 VrefH input Positive reference voltage input, which sets the upper output range (0 to VREFH) and must stay at or below AVDD.
4 AVDD power_in Power supply input, 2.7V to 5.5V.
5 VrefL input Negative reference voltage input, which must stay below VREFH and is limited to AVDD/2 in the reference input specification.
6 GND power_in Ground reference point for all circuitry on the part.
7 VOUTC output Analog output voltage from DAC C, swinging rail-to-rail over the 2.7V to 5.5V supply range.
8 VOUTD output Analog output voltage from DAC D, swinging rail-to-rail over the 2.7V to 5.5V supply range.
9 SYNC input Active-low level-triggered frame sync for the input data; the DAC updates after the 24th clock, and it is a Schmitt-trigger input.
10 SCLK input Serial clock input with data transfer rates up to 50MHz, and it is a Schmitt-trigger input.
11 DIN input Serial data input clocked into the 24-bit input shift register on each falling edge of SCLK, and it is a Schmitt-trigger input.
12 IOVDD power_in Digital input-output power supply, 1.8V to 5.5V per the logic input specifications.
13 A0 input Address 0 input that sets the device address, see Table 2 of the datasheet.
14 A1 input Address 1 input that sets the device address, see Table 2 of the datasheet.
15 ENABLE input Active-low enable that connects the SPI interface to the serial port when LOW.
16 LDAC input Load DACs input, rising-edge triggered, which loads all DAC registers.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-16
Category Data Acquisition
Pins 16

CAD (KiCad official)

  • Symbol: DAC8554IPW
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: dac8554ipw-etched.step / dac8554ipw-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dac8554ipw.step / dac8554ipw.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (34 pp, sha256 cccca85ee631b32d, retrieved 2026-11-05, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF