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DAC8532IDGKR

Public Made by Adom

by adom

Texas Instruments Digital To Analog Converters (DAC), MSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs dac8532idgkr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers dac8532idgkr: viewers · Ray
dac8532idgkr-etched.fit.json dac8532idgkr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
dac8532idgkr-etched.glb dac8532idgkr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
dac8532idgkr-etched.step dac8532idgkr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
dac8532idgkr.glb Publish 0.1.0 · Ray
dac8532idgkr.kicad_mod Publish 0.1.0 · Ray
dac8532idgkr.kicad_sym Publish 0.1.0 · Ray
dac8532idgkr.lbr Publish 0.1.0 · Ray
dac8532idgkr.step Publish 0.1.0 · Ray
package.json dac8532idgkr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
page.json dac8532idgkr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md Initial commit: component/dac8532idgkr · Ray

DAC8532IDGKR

Texas Instruments · Digital To Analog Converters (DAC) · MSOP-8

DAC8532IDGKR from Texas Instruments, in a MSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD power_in Power supply input with operating range 2.7 V to 5.5 V
2 VREF power_in External reference voltage input to set output range of each DAC channel; input range 0 to VDD
3 VOUTB output Analog output voltage from DAC B with output range 0 to VREF and rail-to-rail capability
4 VOUTA output Analog output voltage from DAC A with output range 0 to VREF and rail-to-rail capability
5 SYNC input Active-LOW frame synchronization input; enables shift register and transfers data on SCLK falling edges with execution on 24th falling edge; SYNC HIGH before 24th edge acts as interrupt
6 SCLK input Serial clock input enabling data transfer at rates up to 30 MHz at VDD = 5 V and 20 MHz at VDD = 2.7 V to 3.6 V
7 DIN input Serial data input; data clocked into 24-bit input shift register on falling edge of SCLK
8 GND power_in Ground reference point for all digital and analog circuitry on the device

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package MSOP-8
Category Data Acquisition
Pins 8

CAD (KiCad official)

  • Symbol: DAC8532IDGKR
  • Footprint: Package_SO:MSOP-8_3x3mm_P0.65mm
  • 3D model: MSOP-8 (KiCad packages3D, STEP)
  • 3D model files: dac8532idgkr-etched.step / dac8532idgkr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dac8532idgkr.step / dac8532idgkr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (30 pp, sha256 842c2231d477c61d, retrieved 2026-09-27, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF