component
DAC8311IDCKT
Public Made by Adomby adom
Texas Instruments Digital To Analog Converters (DACs), SC-70-6(SOT-363). Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+114−8@@ -1,13 +1,124 @@ {+ "schema_version": 1,+ "type": "component", "slug": "dac8311idckt",+ "title": "DAC8311IDCKT",+ "brief": "Texas Instruments Digital To Analog Converters (DACs), SC-70-6(SOT-363). Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "Texas Instruments Digital To Analog Converters (DACs), SC-70-6(SOT-363). Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "adc-dac-data conversion", "dac8311idckt" ],+ "component": {+ "mpn": "DAC8311IDCKT",+ "manufacturer": "Texas Instruments",+ "package": "SC-70-6(SOT-363)",+ "pin_count": 6,+ "category": "ADC/DAC/Data Conversion",+ "subcategory": "Digital To Analog Converters (DACs)",+ "datasheet": "https://www.ti.com/cn/lit/gpn/dac8411",+ "parts": {+ "symbol": "dac8311idckt.kicad_sym",+ "footprint": "dac8311idckt.kicad_mod",+ "model_3d": "dac8311idckt.glb",+ "model_3d_step": "dac8311idckt.step",+ "lbr": "dac8311idckt.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "SYNC",+ "type": "input",+ "description": "Active-low, level-triggered frame synchronization input for the serial interface. When SYNC goes low, the input shift register is enabled and data is clocked in on the falling edges of SCLK; the DAC is updated after the 16th clock cycle unless SYNC is taken high early (in which case the rising edge acts as an interrupt and the write is ignored)."+ },+ {+ "number": "2",+ "name": "SCLK",+ "type": "input",+ "description": "Serial clock input. Data on DIN is clocked into the shift register on the falling edge of SCLK at rates up to 50 MHz. Schmitt-triggered logic input."+ },+ {+ "number": "3",+ "name": "DIN",+ "type": "input",+ "description": "Serial data input. Data is clocked into the 16-bit (DAC8311) input shift register on the falling edge of SCLK while SYNC is low."+ },+ {+ "number": "4",+ "name": "AVDD/VREF",+ "type": "power_in",+ "description": "Analog power supply input and reference voltage for the DAC, +2 V to +5.5 V. AVDD sets the full-scale output range (VOUT = 0 to AVDD). Decouple to GND with appropriate bypass capacitors."+ },+ {+ "number": "5",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference for all analog and digital circuitry on the device."+ },+ {+ "number": "6",+ "name": "VOUT",+ "type": "output",+ "description": "Analog voltage output from the DAC. The rail-to-rail output amplifier swings from 0 V to AVDD and can drive a 2 k\u03a9 load with up to 200 pF capacitance while maintaining stability."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/dac8411",+ "pages": 41,+ "sha256": "8453ec6a1673f061",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 6,+ "described": 6,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "Texas Instruments",+ "Package": "SC-70-6(SOT-363)",+ "Category": "ADC/DAC/Data Conversion",+ "Pins": "6"+ }+ },+ "variants": [+ {+ "mpn": "DAC8311IDCKT",+ "kind": "packaging"+ },+ {+ "mpn": "DAC8311IDCKR",+ "kind": "unknown"+ }+ ],+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "dac8311idckt"+ ],+ "discovery_pitch": "DAC8311IDCKT (Texas Instruments) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +136,5 @@ "docs/dac8311idckt-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }