component
DAC8168ICPWR
Public Made by Adomby adom
Texas Instruments Digital To Analog Converters (DAC), TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads on click. Unloads only if this page sits in the background.
PCB Footprint
Open full view ↗Loads on click. Unloads only if this page sits in the background.
Datasheet
Open in new tab ↗Loads on click. Unloads only if this page sits in the background.
README
markdownDAC8168ICPWR
Texas Instruments · Digital To Analog Converters (DAC) · TSSOP-16
DAC8168ICPWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | LDAC | input | Load DACs; used for asynchronous and synchronous update control of DAC output registers. |
| 2 | SYNC | input | Level-triggered control input (active low); frame synchronization signal enabling input shift register when low. |
| 3 | AVDD | power_in | Power-supply input; operating voltage range 2.7V to 5.5V. |
| 4 | VOUTA | output | Analog output voltage from DAC A; output voltage range 0V to AVDD. |
| 5 | VOUTC | output | Analog output voltage from DAC C; output voltage range 0V to AVDD. |
| 6 | VOUTE | output | Analog output voltage from DAC E; output voltage range 0V to AVDD. |
| 7 | VOUTG | output | Analog output voltage from DAC G; output voltage range 0V to AVDD. |
| 8 | VREFIN/VREFOUT | bidirectional | Positive reference input/reference output; 2.5V internal reference (default disabled) or external reference input up to AVDD/2 for grade C. |
| 9 | CLR | input | Asynchronous clear input; falling edge triggered to clear all DAC registers and buffers; minimum pulse width 80ns. |
| 10 | VOUTH | output | Analog output voltage from DAC H; output voltage range 0V to AVDD. |
| 11 | VOUTF | output | Analog output voltage from DAC F; output voltage range 0V to AVDD. |
| 12 | VOUTD | output | Analog output voltage from DAC D; output voltage range 0V to AVDD. |
| 13 | VOUTB | output | Analog output voltage from DAC B; output voltage range 0V to AVDD. |
| 14 | GND | power_in | Ground reference point for all circuitry on the device. |
| 15 | DIN | input | Serial data input; data clocked into 32-bit shift register on each falling edge of SCLK; Schmitt-trigger logic input. |
| 16 | SCLK | input | Serial clock input; maximum data transfer rate 50MHz; Schmitt-trigger logic input. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-16 |
| Category | Data Acquisition |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
DAC8168ICPWR - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files:
dac8168icpwr-etched.step/dac8168icpwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dac8168icpwr.step/dac8168icpwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (72 pp, sha256
e14f8beb0a8c704b, retrieved 2026-09-27, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).