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Generated by kicad-footprint-generator · KiCad file format 20260206

Name	Last commit message	Last updated
docs	Publish 0.1.0 · Ray	1d ago
viewers	dac8168icpw: viewers · Ray	1d ago
dac8168icpw-etched.glb	dac8168icpw: factory component page (tier=lcsc) · Ray	1d ago
dac8168icpw-etched.step	dac8168icpw: factory component page (tier=lcsc) · Ray	1d ago
dac8168icpw-hero.glb	dac8168icpw: hero GLB from the etched model (keeps the MPN mark) · Ray	7h ago
dac8168icpw-hero.overlay.json	Publish 0.1.0 · Ray	1d ago
dac8168icpw.glb	Publish 0.1.0 · Ray	1d ago
dac8168icpw.kicad_mod	Publish 0.1.0 · Ray	1d ago
dac8168icpw.kicad_sym	Publish 0.1.0 · Ray	1d ago
dac8168icpw.lbr	Publish 0.1.0 · Ray	1d ago
dac8168icpw.step	Publish 0.1.0 · Ray	1d ago
package.json	Publish 0.1.0 · Ray	1d ago
page.json	Set visibility: public · Ray	1d ago
README.md	Initial commit: component/dac8168icpw · Ray	1d ago

DAC8168ICPW

Texas Instruments · Digital To Analog Converters (DAC) · TSSOP-16

DAC8168ICPW from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	LDAC	input	Load DACs control input; the datasheet pin table gives no further electrical limits for this pin.
2	SYNC	input	Active-low, level-triggered frame sync input: data are sampled on subsequent falling SCLK edges after SYNC goes low, the DAC output updates after the 32nd clock, and a SYNC rising edge before the 31st clock is an interrupt that causes the write to be ignored (Schmitt-Trigger input).
3	AVDD	power_in	Power supply input, 2.7 V to 5.5 V.
4	VOUTA	output	Analog output voltage from DAC A.
5	VOUTC	output	Analog output voltage from DAC C.
6	VOUTE	output	Analog output voltage from DAC E.
7	VOUTG	output	Analog output voltage from DAC G.
8	VREFIN/VREFOUT	bidirectional	Positive reference input / reference output; provides 2.5 V when the internal reference is used, and for grade C devices the external VREFIN (max) must be ≤ AVDD/2.
9	CLR	input	Asynchronous clear input.
10	VOUTH	output	Analog output voltage from DAC H.
11	VOUTF	output	Analog output voltage from DAC F.
12	VOUTD	output	Analog output voltage from DAC D.
13	VOUTB	output	Analog output voltage from DAC B.
14	GND	power_in	Ground reference point for all circuitry on the device.
15	DIN	input	Serial data input clocked into the 32-bit input shift register on each falling SCLK edge (Schmitt-Trigger input).
16	SCLK	input	Serial clock input supporting data transfer at rates up to 50 MHz (Schmitt-Trigger input).

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	TSSOP-16
Category	Data Acquisition
Pins	16

CAD (KiCad official)

Symbol: DAC8168ICPW
Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
3D model: TSSOP-16 (KiCad packages3D, STEP)
3D model files: dac8168icpw-etched.step / dac8168icpw-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dac8168icpw.step / dac8168icpw.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (72 pp, sha256 e14f8beb0a8c704b, retrieved 2026-10-08, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF