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DAC8168IAPW
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Texas Instruments Digital To Analog Converters (DAC), TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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DAC8168IAPW
Texas Instruments · Digital To Analog Converters (DAC) · TSSOP-14
DAC8168IAPW from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SYNC | input | Active-low, level-triggered frame synchronization input (Schmitt-trigger); the DAC output updates after the 32nd clock, and a rising SYNC edge before the 31st clock edge aborts the write sequence. |
| 2 | AVDD | power_in | Power-supply input, 2.7 V to 5.5 V. |
| 3 | VOUTA | output | Analog output voltage from DAC A. |
| 4 | VOUTC | output | Analog output voltage from DAC C. |
| 5 | VOUTE | output | Analog output voltage from DAC E. |
| 6 | VOUTG | output | Analog output voltage from DAC G. |
| 7 | VREFIN/VREFOUT | bidirectional | Positive reference input / reference output, 2.5 V when the internal reference is used; for grades A and B the external VREFIN (max) must be ≤ AVDD. |
| 8 | VOUTH | output | Analog output voltage from DAC H. |
| 9 | VOUTF | output | Analog output voltage from DAC F. |
| 10 | VOUTD | output | Analog output voltage from DAC D. |
| 11 | VOUTB | output | Analog output voltage from DAC B. |
| 12 | GND | power_in | Ground reference point for all circuitry on the device. |
| 13 | DIN | input | Serial data input clocked into the 32-bit input shift register on each falling SCLK edge (Schmitt-trigger logic input). |
| 14 | SCLK | input | Serial clock input; data can be transferred at rates up to 50 MHz (Schmitt-trigger logic input). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-14 |
| Category | Data Acquisition |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
DAC8168IAPW - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
dac8168iapw-etched.step/dac8168iapw-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dac8168iapw.step/dac8168iapw.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (72 pp, sha256
72c867a78805e503, retrieved 2026-10-11, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# DAC8168IAPW
**Texas Instruments** · Digital To Analog Converters (DAC) · TSSOP-14
DAC8168IAPW from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SYNC | input | Active-low, level-triggered frame synchronization input (Schmitt-trigger); the DAC output updates after the 32nd clock, and a rising SYNC edge before the 31st clock edge aborts the write sequence. |
| 2 | AVDD | power_in | Power-supply input, 2.7 V to 5.5 V. |
| 3 | VOUTA | output | Analog output voltage from DAC A. |
| 4 | VOUTC | output | Analog output voltage from DAC C. |
| 5 | VOUTE | output | Analog output voltage from DAC E. |
| 6 | VOUTG | output | Analog output voltage from DAC G. |
| 7 | VREFIN/VREFOUT | bidirectional | Positive reference input / reference output, 2.5 V when the internal reference is used; for grades A and B the external VREFIN (max) must be ≤ AVDD. |
| 8 | VOUTH | output | Analog output voltage from DAC H. |
| 9 | VOUTF | output | Analog output voltage from DAC F. |
| 10 | VOUTD | output | Analog output voltage from DAC D. |
| 11 | VOUTB | output | Analog output voltage from DAC B. |
| 12 | GND | power_in | Ground reference point for all circuitry on the device. |
| 13 | DIN | input | Serial data input clocked into the 32-bit input shift register on each falling SCLK edge (Schmitt-trigger logic input). |
| 14 | SCLK | input | Serial clock input; data can be transferred at rates up to 50 MHz (Schmitt-trigger logic input). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-14 |
| Category | Data Acquisition |
| Pins | 14 |
## CAD (KiCad official)
- Symbol: `DAC8168IAPW`
- Footprint: `Package_SO:TSSOP-14_4.4x5mm_P0.65mm`
- 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files: `dac8168iapw-etched.step` / `dac8168iapw-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `dac8168iapw.step` / `dac8168iapw.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/dac7568) (72 pp, sha256 `72c867a78805e503`, retrieved 2026-10-11, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/dac8168iapw-datasheet.pdf)