component
DAC8163TDSCR
Public Made by Adomby adom
Texas Instruments Digital To Analog Converters (DAC), WSON-10-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownDAC8163TDSCR
Texas Instruments · Digital To Analog Converters (DAC) · WSON-10-EP(3x3)
DAC8163TDSCR from Texas Instruments, in a WSON-10-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUTA | output | Analog output voltage from DAC-A. |
| 2 | VOUTB | output | Analog output voltage from DAC-B. |
| 3 | GND | power_in | Ground reference point for all circuitry on the device. |
| 4 | LDAC | input | Must be connected to GND permanently or held low before commands are sent in synchronous mode; in asynchronous mode a negative edge updates all DAC output registers simultaneously, and LDAC must return high before the next serial command. |
| 5 | CLR | input | Falling-edge-sensitive asynchronous clear input that loads mid-scale (DACxx63T) into all input and DAC registers, and activating it during a write sequence aborts that write. |
| 6 | SYNC | input | Active-low level-triggered frame synchronization input; a rising edge before the 23rd clock edge acts as an interrupt that discards the write sequence, and the DAC updates on the 24th falling SCLK edge. |
| 7 | SCLK | input | Serial clock input supporting data transfer at rates up to 50 MHz, with Schmitt-trigger logic input. |
| 8 | DIN | input | Serial data input clocked into the 24-bit input shift register on each falling SCLK edge, with Schmitt-trigger logic input. |
| 9 | AVDD | power_in | Power-supply input specified at 2.7 V to 5.5 V (AVDD to GND, absolute maximum 6 V). |
| 10 | VREFIN/VREFOUT | bidirectional | Bidirectional voltage reference pin that provides a 2.5-V output when the internal reference is used, and otherwise accepts an external reference of 0 V to AVDD. |
| 11 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WSON-10-EP(3x3) |
| Category | Data Acquisition |
| Pins | 11 |
CAD (KiCad official)
- Symbol:
DAC8163TDSCR - Footprint:
Package_SON:VSON-10-1EP_3x3mm_P0.5mm_EP1.2x2mm - 3D model: WSON-10-EP(3x3) (KiCad packages3D, STEP)
- 3D model files:
dac8163tdscr-etched.step/dac8163tdscr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dac8163tdscr.step/dac8163tdscr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (63 pp, sha256
c924f9150c60d73e, retrieved 2026-10-11, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).