DAC8162SDSCR

{
  "slug": "dac8162sdscr",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments Digital To Analog Converters (DACs), WSON-10-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
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    "adc-dac-data conversion",
    "dac8162sdscr",
    "factory-2.0.0",
    "extractor-text"
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  "dependencies": {},
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    "dac8162sdscr.lbr",
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    "docs/dac8162sdscr-datasheet.pdf",
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  "component": {
    "mpn": "DAC8162SDSCR",
    "manufacturer": "Texas Instruments",
    "package": "WSON-10-EP(3x3)",
    "pin_count": 11,
    "category": "ADC/DAC/Data Conversion",
    "subcategory": "Digital To Analog Converters (DACs)",
    "datasheet": "https://www.ti.com/cn/lit/gpn/dac8563",
    "parts": {
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      "footprint": "dac8162sdscr.kicad_mod",
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      "lbr": "dac8162sdscr.lbr"
    },
    "distributor_links": {
      "lcsc": "C1555649",
      "digikey": "296-29027-2-ND",
      "mouser": "595-DAC8162SDSCR"
    },
    "distributor_check": {
      "checked_at": "2026-10-11T03:47:50Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "296-29027-2-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "595-DAC8162SDSCR",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "VOUTA",
        "type": "output",
        "description": "Analog output voltage from DAC-A; absolute maximum VOUT[A,B] to GND is -0.3 V to AVDD + 0.3 V."
      },
      {
        "number": "2",
        "name": "VOUTB",
        "type": "output",
        "description": "Analog output voltage from DAC-B; absolute maximum VOUT[A,B] to GND is -0.3 V to AVDD + 0.3 V."
      },
      {
        "number": "3",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference point for all circuitry on the device."
      },
      {
        "number": "4",
        "name": "LDAC",
        "type": "input",
        "description": "Must be connected to GND permanently or held low before commands are sent in synchronous mode, and acts as a negative edge-triggered signal for simultaneous DAC updates in asynchronous mode."
      },
      {
        "number": "5",
        "name": "CLR",
        "type": "input",
        "description": "Falling-edge sensitive asynchronous clear input that loads zero scale (DACxx62) to all input and DAC registers; the device exits clear mode on the 24th falling edge of the next write."
      },
      {
        "number": "6",
        "name": "SYNC",
        "type": "input",
        "description": "Active-low level-triggered frame sync input (Schmitt-trigger); the DAC output updates after the 24th SCLK falling edge, and a SYNC rising edge before the 23rd clock edge interrupts and discards the write."
      },
      {
        "number": "7",
        "name": "SCLK",
        "type": "input",
        "description": "Serial clock input (Schmitt-trigger) supporting data transfer at rates up to 50 MHz."
      },
      {
        "number": "8",
        "name": "DIN",
        "type": "input",
        "description": "Serial data input (Schmitt-trigger) clocked into the 24-bit input shift register on each falling edge of SCLK."
      },
      {
        "number": "9",
        "name": "AVDD",
        "type": "power_in",
        "description": "Power-supply input, 2.7 V to 5.5 V."
      },
      {
        "number": "10",
        "name": "VREFIN/VREFOUT",
        "type": "bidirectional",
        "description": "Bidirectional voltage reference pin: 2.5-V output when the internal reference is used, otherwise an input with reference voltage range 0 V to AVDD."
      },
      {
        "number": "11",
        "name": "EP",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
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        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The WSON thermal pad is shown in the pin diagram as 'Thermal Pad(1)' but is not assigned a number in; The Pin Functions table gives one set of pin numbers (1-10) that is shared by the VSSOP (DGS) and WS; The datasheet covers the DAC8162 as a 14-bit device with zero-scale clear (DACxx62), as stated in th",
          "exposed pad 11 added from the footprint"
        ],
        "pages_sent": 13,
        "cost_usd": 0.0868,
        "at": "2026-10-11T03:47:36"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/dac8563",
        "pages": 63,
        "sha256": "3fbba20baac4cf7e",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 11,
        "described": 11,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
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        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "1b436233b33ebba84da89538e97b0062d5b95e5ae0b484c46c569cb67274a3a5",
        "checked": "2026-10-11",
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  }
}