component
DAC81408RHAR
Public Made by Adomby adom
Texas Instruments Digital To Analog Converters (DAC), QFN-40-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownDAC81408RHAR
Texas Instruments · Digital To Analog Converters (DAC) · QFN-40-EP(6x6)
DAC81408RHAR from Texas Instruments, in a QFN-40-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | No connection. |
| 2 | NC | unconnected | No connection. |
| 3 | NC | unconnected | No connection. |
| 4 | NC | unconnected | No connection. |
| 5 | OUT0 | output | Analog DAC output voltage for channel 0, can sink or source up to 25 mA. |
| 6 | OUT1 | output | Analog DAC output voltage for channel 1, can sink or source up to 25 mA. |
| 7 | OUT2 | output | Analog DAC output voltage for channel 2, can sink or source up to 25 mA. |
| 8 | OUT3 | output | Analog DAC output voltage for channel 3, can sink or source up to 25 mA. |
| 9 | VIO | power_in | IO supply voltage from 1.7 V to 5.5 V, sets the I/O operating voltage for the device. |
| 10 | GND | power_in | Ground reference point for all circuitry on the device. |
| 11 | SDO | output | Serial interface data output, enabled by SDO-EN bit, clocked out on rising or falling edge of SCLK as specified by FSDO bit. |
| 12 | SCLK | input | Serial interface clock input. |
| 13 | SDI | input | Serial interface data input, clocked in on each falling edge of SCLK. |
| 14 | CS | input | Active low chip select, frame synchronization signal for serial interface. |
| 15 | TOGGLE0 | input | Toggle control pin for DAC outputs configured for toggle operation, logic low selects Register A, high selects Register B. |
| 16 | TOGGLE1 | input | Toggle control pin for DAC outputs configured for toggle operation, logic low selects Register A, high selects Register B. |
| 17 | TOGGLE2 | input | Toggle control pin for DAC outputs configured for toggle operation, logic low selects Register A, high selects Register B. |
| 18 | LDAC | input | Active low load DAC signal, updates synchronous mode channels when low. |
| 19 | RESET | input | Active low reset input, minimum 500 ns pulse causes power-on-reset event. |
| 20 | CLR | input | Active low clear input, clears all DAC outputs to their clear code. |
| 21 | ALMOUT | tri_state | Open drain alarm output, requires external 10-kΩ pull-up resistor to VIO or lower. |
| 22 | TEMPOUT | output | Analog temperature monitor output with -4 mV/°C slope and 1.34 V offset. |
| 23 | OUT4 | output | Analog DAC output voltage for channel 4, can sink or source up to 25 mA. |
| 24 | OUT5 | output | Analog DAC output voltage for channel 5, can sink or source up to 25 mA. |
| 25 | OUT6 | output | Analog DAC output voltage for channel 6, can sink or source up to 25 mA. |
| 26 | OUT7 | output | Analog DAC output voltage for channel 7, can sink or source up to 25 mA. |
| 27 | NC | unconnected | No connection. |
| 28 | NC | unconnected | No connection. |
| 29 | NC | unconnected | No connection. |
| 30 | NC | unconnected | No connection. |
| 31 | VCC | power_in | Output positive analog power supply, 9 V to 41.5 V. |
| 32 | VSS | power_in | Output negative analog power supply, -21.5 V to 0 V. |
| 33 | REF | bidirectional | Reference input for external reference mode or reference output for internal reference mode, connect 150-nF capacitor to ground. |
| 34 | REFCMP | passive | Reference compensation capacitor connection, connect 330-pF capacitor between REFCMP and REFGND. |
| 35 | REFGND | power_in | Ground reference point for the internal reference circuit. |
| 36 | GND | power_in | Ground reference point for all circuitry on the device. |
| 37 | VAA | power_in | Analog supply voltage, 4.5 V to 5.5 V, must be at same potential as VDD. |
| 38 | VDD | power_in | Digital supply voltage, 4.5 V to 5.5 V, must be at same potential as VAA. |
| 39 | VSS | power_in | Output negative analog power supply, -21.5 V to 0 V. |
| 40 | VCC | power_in | Output positive analog power supply, 9 V to 41.5 V. |
| 41 | THERMAL PAD | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | QFN-40-EP(6x6) |
| Category | Data Acquisition |
| Pins | 41 |
CAD (KiCad official)
- Symbol:
DAC81408RHAR - Footprint:
Package_DFN_QFN:QFN-40-1EP_6x6mm_P0.5mm_EP4.6x4.6mm - 3D model: QFN-40-EP(6x6) (KiCad packages3D, STEP)
- 3D model files:
dac81408rhar-etched.step/dac81408rhar-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dac81408rhar.step/dac81408rhar.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (57 pp, sha256
e7e735c17754d8c0, retrieved 2026-10-05, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).