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DAC8043U
Public Made by Adomby adom
Texas Instruments Digital To Analog Converters (DACs), SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownDAC8043U
Texas Instruments · Digital To Analog Converters (DACs) · SOIC-8
DAC8043U from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VREF | power_in | Reference voltage input to the R-2R ladder (input resistance 7 kΩ to 15 kΩ), which may be driven by AC or DC, positive or negative voltage within ±25V absolute maximum. |
| 2 | RFB | passive | Internal feedback resistor terminal for the external output op amp, rated ±25V to GND absolute maximum. |
| 3 | IOUT | output | DAC current output, with output voltage limited to -0.3V to VDD and output capacitance of 80pF to 110pF depending on code. |
| 4 | GND | power_in | Ground; the output op amp analog common should be connected as near to this pin as possible. |
| 5 | LD | input | Load input; taking it low loads the input register data into the DAC register (minimum pulse width 120 ns). |
| 6 | SRI | input | Serial data input, MSB first, clocked into the input shift register on the rising edge of CLK (40 ns setup, 80 ns hold). |
| 7 | CLK | input | Clock input; serial data is clocked into the input register on the rising edge (minimum high 90 ns, low 120 ns). |
| 8 | VDD | power_in | Positive supply, +5V nominal (4.75V to 5.25V), 7V absolute maximum, decoupled with a 1µF tantalum capacitor close to the device. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | ADC/DAC/Data Conversion |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Nonlinearity | INL | -1 | 1 | LSB | 2 | ||
| Differential Nonlinearity | DNL | -1 | 1 | LSB | 2 | ||
| Gain Error | FSE | -2 | 2 | LSB | TA = +25°C | 2 | |
| Gain Tempco | TCFSE | -5 | 5 | ppm/°C | 2 | ||
| Power Supply Rejection Ratio | PSRR | 0.0006 | 0.002 | %/% | ∆VDD = ±5% | 2 | |
| Output Leakage Current | ILKG | -5 | 5 | nA | TA = +25°C | 2 | |
| Output Leakage Current | ILKG | -100 | 100 | nA | TA = Full Temp Range | 2 | |
| Zero Scale Error | IZSE | 0.03 | LSB | TA = +25°C | 2 | ||
| Zero Scale Error | IZSE | 0.6 | LSB | TA = Full Temp Range | 2 | ||
| Input Resistance | RIN | 7 | 11 | 15 | kΩ | 2 | |
| Output Current Settling Time | tS | 0.25 | 1 | µs | TA = +25°C | 2 | |
| Digital-to-Analog Glitch Energy | Q | 2 | 20 | nVs | VREF = 0V | 2 | |
| Feedthrough Error | FT | 0.7 | 1 | mVp-p | VREF = 20Vp-p at f = 10kHz, Digital Input = 0000 0000 0000, TA = +25°C | 2 | |
| Digital Input High | VIH | 2.4 | V | 2 | |||
| Digital Input Low | VIL | 0.8 | V | 2 | |||
| Input Leakage Current | IIL | -1 | 1 | µA | VIN = 0V to +5V | 2 | |
| Data Setup Time | tDS | 40 | ns | TA = Full Temperature Range | 2 | ||
| Data Hold Time | tDH | 80 | ns | TA = Full Temperature Range | 2 | ||
| Clock Pulse Width High | tCH | 90 | ns | TA = Full Temperature Range | 2 | ||
| Clock Pulse Width Low | tCL | 120 | ns | TA = Full Temperature Range | 2 | ||
| Load Pulse Width | tLD | 120 | ns | TA = Full Temperature Range | 2 | ||
| LSB Clock into Input Register to Load DAC Register Time | tASB | 0 | ns | TA = Full Temperature Range | 2 | ||
| Supply Voltage | VDD | 4.75 | 5 | 5.25 | V | 2 | |
| Supply Current | IDD | 500 | µA | Digital Inputs = VIH or VIL | 2 | ||
| Supply Current | IDD | 100 | µA | Digital Inputs = 0V or VDD | 2 | ||
| Resolution | N | 12 | Bits | 2 | |||
| Total Harmonic Distortion | THD | -85 | dB | VREF = 6VRMS at 1kHz, DAC Register Loaded with all 1s | 2 | ||
| Output Noise Voltage Density | eN | 17 | nV/√Hz | 10Hz to 100kHz, Between RFB and IOUT | 2 | ||
| Input Capacitance | CIN | 8 | pF | VIN = 0V | 2 | ||
| Output Capacitance | COUT | 110 | pF | Digital Inputs = VIH | 2 | ||
| Output Capacitance | COUT | 80 | pF | Digital Inputs = VIL | 2 | ||
| VDD to GND | VDD | 0 | 7 | V | 3 | ||
| VREF to GND | VREF | -25 | 25 | V | 3 | ||
| VRFB to GND | VRFB | -25 | 25 | V | 3 | ||
| Digital Input Voltage Range | -0.3 | V | -0.3V to VDD | 3 | |||
| Output Voltage (Pin 3) | -0.3 | V | -0.3 V to VDD | 3 | |||
| Operating Temperature Range | -40 | 85 | °C | U, UC | 3 | ||
| Junction Temperature | TJ | 150 | °C | 3 | |||
| Storage Temperature | Tstg | -65 | 150 | °C | 3 | ||
| Lead Temperature | 300 | °C | soldering, 10s | 3 | |||
| Thermal Resistance Junction-Ambient | θJA | 100 | °C/W | 3 | |||
| Thermal Resistance Junction-Case | θJC | 42 | °C/W | 3 |
CAD (KiCad official)
- Symbol:
DAC8043U - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
dac8043u-etched.step/dac8043u-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dac8043u.step/dac8043u.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (13 pp, sha256
e0d2b55282f1f388, retrieved 2026-10-23, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).