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DAC7811IDGST

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Texas Instruments Digital To Analog Converters (DACs), VSSOP-10-0.5mm. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentadc-dac-data conversiondac7811idgstfactory-2.0.0extractor-text

Verified DAC7811IDGST

by Ray · last 6 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

6 Nov 2026RayPublished by the parts factory: tier mfr, 10 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: DAC7811IDGST · VSSOP-10-0.5mm · 10 pins
  • ✓copper: 10 copper pads, none touching another net
  • ✓datasheet: all 10 pin names found in the 31-page datasheet
  • ✓distributor: lcsc C2679465, digikey 296-47762-2-ND, mouser 595-DAC7811IDGST
  • ✓family: MSOP-10_3x3mm_P0.5mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-iqp63_i0/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 10 pins = 10 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 10 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ dac7811idgst.kicad_sym✓ dac7811idgst.kicad_mod✓ dac7811idgst.step
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Ray Publish 0.1.0 071317f 1d ago

DAC7811IDGST

Texas Instruments · Digital To Analog Converters (DACs) · VSSOP-10-0.5mm

DAC7811IDGST from Texas Instruments, in a VSSOP-10-0.5mm. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IOUT1 output DAC current output pin; the output current is set by the digital code and the VREF input, and the voltage output is established through RFB with an external amplifier.
2 IOUT2 output DAC current output pin (named IOUT2); the datasheet table text describes this pin as normally tied to the system analog ground.
3 GND power_in Ground pin and device ground reference; VDD is specified to GND with an absolute maximum range of -0.3 V to 7 V.
4 SCLK input Serial clock input; data is clocked into the input shift register on the falling edge by default, or on the rising edge if configured through the control bits.
5 SDIN input Serial data input clocked into the 16-bit input register on the active SCLK edge, which is falling by default.
6 SYNC input Active-low frame synchronization input; when low it powers on the SCLK and DIN buffers and enables the input shift register, and data latches on the 16th clock edge in stand-alone mode.
7 SDO output Serial data output for daisy-chaining and DAC register readback, clocked out on the opposite edge to the one used for loading data.
8 VDD power_in Positive power supply input; the device operates from a supply of 2.7 V to 5.5 V.
9 VREF power_in DAC reference voltage input; the recommended reference voltage range is -15 V to 15 V.
10 RFB output DAC feedback resistor pin; connect it to the external amplifier output to establish the DAC voltage output.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VSSOP-10-0.5mm
Category ADC/DAC/Data Conversion
Pins 10

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VDD to GND VDD -0.3 7 V 4
Digital input voltage to GND -0.3 V VDD + 0.3 printed as max 4
IOUT1, IOUT2 to GND IOUT1, IOUT2 -0.3 V VDD + 0.3 printed as max 4
Operating temperature -40 125 °C 4
Junction temperature (TJ max) TJ 150 °C 4
Storage temperature Tstg -65 150 °C 4
Supply voltage to GND VDD 2.7 5.5 V 4
Reference voltage VREF -15 15 V 4
Input low voltage VIL 0.6 V VDD = 2.7 V 4
Input low voltage VIL 0.8 V VDD = 5 V 4
Input high voltage VIH 2.1 V VDD = 2.7 V 4
Input high voltage VIH 2.4 V VDD = 5 V 4
Operating ambient temperature TA -40 125 °C 4
Relative accuracy -1 1 LSB 5
Differential nonlinearity -1 1 LSB 5
Output leakage current -5 5 nA Data = 0000h, TA = 25°C 5
Output leakage current -25 25 nA Data = 0000h, TA = TMAX 5
Full-scale gain error 5 10 mV All ones loaded to DAC register 5
Full-scale tempco -5 5 ppm/°C 5
Input resistance 8 10 12 kΩ 5
RFB resistance RFB 8 10 12 kΩ 5
Input leakage current IIL 10 µA 5
Input capacitance CIL 10 pF 5
Output capacitance 5 pF Code dependent 5
Clock frequency fCLK 50 MHz 5
Clock period tC 20 ns 5
Clock pulse width high tCH 8 ns 5
Clock pulse width low tCC 8 ns 5
SYNC falling edge to SCLK active edge setup time tCSS 13 ns 5
SCLK active edge to SYNC rising edge hold time tCST 5 ns 5
Data setup time tDS 5 ns 5
Data hold time tDH 3 ns 5
SYNC high time tSH 30 ns 5
SYNC inactive edge to SDO valid tDDS 25 35 ns VDD = 2.7 V 5
SYNC inactive edge to SDO valid tDDS 20 30 ns VDD = 5 V 5
IDD (normal operation) IDD 5 µA Logic inputs = 0 V 5
IDD (normal operation) IDD 0.8 5 µA VDD = 4.5 V to 5.5 V; VIH = VDD and VIL = GND 5
IDD (normal operation) IDD 0.4 2.5 µA VDD = 2.7 V to 3.6 V; VIH = VDD and VIL = GND 5
Feedthrough error VOUT/VREF VOUT/VREF -60 dB Data = 000h, VREF = 100 kHz 5
Output voltage settling time 0.2 µs 5
Reference multiplying bandwidth 10 MHz VREF = 7 VPP, Data = FFFh 5
DAC glitch impulse 5 nV-s VREF = 0 V to 10 V, Data = 7FFh to 800h to 7FFh 5
Digital feedthrough 2 nV-s 5
Total harmonic distortion THD -105 dB 5
Output spot noise voltage 18 nV/√Hz 5
Junction-to-ambient thermal resistance RθJA 165.6 °C/W DGS (VSSOP) 10 pins 4
Junction-to-case (top) thermal resistance RθJC(top) 55.4 °C/W DGS (VSSOP) 10 pins 4
Junction-to-board thermal resistance RθJB 85.6 °C/W DGS (VSSOP) 10 pins 4
Junction-to-top characterization parameter ψJT 6.2 °C/W DGS (VSSOP) 10 pins 4
Junction-to-board characterization parameter ψJB 84.2 °C/W DGS (VSSOP) 10 pins 4

CAD (KiCad official)

  • Symbol: DAC7811IDGST
  • Footprint: Package_SO:MSOP-10_3x3mm_P0.5mm
  • 3D model: VSSOP-10-0.5mm (KiCad packages3D, STEP)
  • 3D model files: dac7811idgst-etched.step / dac7811idgst-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dac7811idgst.step / dac7811idgst.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (31 pp, sha256 6a9228242b8fa8c2, retrieved 2026-11-06, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF