component
DAC7760IRHAR
Public Made by Adomby adom
Texas Instruments Digital To Analog Converters (DAC), VQFN-40-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 16d ago |
| viewers | 16d ago |
| dac7760irhar-etched.glb | 16d ago |
| dac7760irhar-etched.step | 16d ago |
| dac7760irhar-hero.glb | 16d ago |
| dac7760irhar-hero.overlay.json | 16d ago |
| dac7760irhar.glb | 16d ago |
| dac7760irhar.kicad_mod | 16d ago |
| dac7760irhar.kicad_sym | 16d ago |
| dac7760irhar.lbr | 16d ago |
| dac7760irhar.step | 16d ago |
| package.json | 16d ago |
| page.json | 16d ago |
| README.md | 16d ago |
DAC7760IRHAR
Texas Instruments · Digital To Analog Converters (DAC) · VQFN-40-EP(6x6)
DAC7760IRHAR from Texas Instruments, in a VQFN-40-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | No connection. |
| 2 | ALARM | output | Open-drain alarm output that goes low when an alarm condition (open circuit, over temperature, timeout, etc.) is detected, and requires an external 10 kΩ pullup resistor. |
| 3 | GND | power_in | Ground reference for all digital circuitry; connect to 0 V. |
| 4 | CLR-SEL | input | Selects the VOUT value in the CLEAR state after power-on and reset. |
| 5 | CLR | input | Clear input; a logic high causes the part to enter the CLEAR state (active high). |
| 6 | LATCH | input | Load DAC registers input; a rising edge loads the input shift register data into the DAC data and control registers and updates the DAC outputs. |
| 7 | SCLK | input | SPI serial clock input (Schmitt-trigger), with data transfer rates up to 30 MHz. |
| 8 | DIN | input | Serial data input (Schmitt-trigger); data are clocked into the 24-bit input shift register on the rising edge of SCLK. |
| 9 | SDO | output | Serial data output; data are valid on the rising edge of SCLK. |
| 10 | NC | unconnected | No connection. |
| 11 | NC | unconnected | No connection. |
| 12 | GND | power_in | Ground reference for analog circuitry; connect to 0 V. |
| 13 | GND | power_in | Ground reference for analog circuitry; connect to 0 V. |
| 14 | AVSS | power_in | Negative analog supply in dual-supply operation; connects to GND in single-supply operation. |
| 15 | GND | power_in | Ground reference for analog circuitry; connect to 0 V. |
| 16 | ISET-R | input | Connection for the external precision resistor (15 kΩ). |
| 17 | REFOUT | output | Internal reference output; connect to REFIN when using the internal reference. |
| 18 | REFIN | input | Reference input (4.95 V to 5.05 V recommended operating range). |
| 19 | NC | unconnected | No connection. |
| 20 | NC | unconnected | No connection. |
| 21 | NC | unconnected | No connection. |
| 22 | NC | unconnected | No connection. |
| 23 | DVDD-EN | input | Internal supply enable; connect to GND to disable the internal supply (requiring an external DVDD supply), or leave unconnected to enable it. |
| 24 | CMP | output | Compensation capacitor connection; an external capacitor between VOUT and CMP improves stability with high capacitive loads, and if it exceeds 470 pF an additional 100-pF capacitor from CMP to GND is required. |
| 25 | HART-IN | input | Input pin for HART modulation signal. |
| 26 | IOUT | output | Current output pin. |
| 27 | BOOST | output | Boost pin for optional external transistor connection. |
| 28 | CAP1 | input | Connection for optional current output filtering capacitor. |
| 29 | CAP2 | input | Connection for optional current output filtering capacitor. |
| 30 | NC | unconnected | No connection. |
| 31 | NC | unconnected | No connection. |
| 32 | VOUT | output | Buffered analog voltage output. |
| 33 | +VSENSE | input | Sense pin for the positive voltage output load connection. |
| 34 | -VSENSE | input | Sense pin for the negative voltage output load connection. |
| 35 | NC | unconnected | No connection. |
| 36 | AVDD | power_in | Positive analog power supply (AVDD + |
| 37 | AVSS | power_in | Negative analog power supply in dual-supply operation; connects to GND in single-supply operation. |
| 38 | NC | unconnected | No connection. |
| 39 | DVDD | power_in | Digital power supply, which can be an input or an output depending on DVDD-EN; 2.7 V to 5.5 V when the internal regulator is disabled. |
| 40 | NC | unconnected | No connection. |
| 41 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-40-EP(6x6) |
| Category | Data Acquisition |
| Pins | 41 |
CAD (KiCad official)
- Symbol:
DAC7760IRHAR - Footprint:
Package_DFN_QFN:QFN-40-1EP_6x6mm_P0.5mm_EP4.6x4.6mm - 3D model: VQFN-40-EP(6x6) (KiCad packages3D, STEP)
- 3D model files:
dac7760irhar-etched.step/dac7760irhar-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dac7760irhar.step/dac7760irhar.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (73 pp, sha256
b67558a99d602959, retrieved 2026-10-10, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).