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DAC7731EC
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Texas Instruments Digital To Analog Converters (DACs), SSOP-24. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+60@@ -0,0 +1,60 @@+# DAC7731EC++**Texas Instruments** · Digital To Analog Converters (DACs) · SSOP-24++DAC7731EC from Texas Instruments, in a SSOP-24. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VCC | power_in | Positive analog power supply; the electrical characteristics specify +11.4V to +15.75V. |+| 2 | REFOUT | output | Internal +10V reference output, enabled when REFEN is LOW and connected to REFIN for internal reference use. |+| 3 | REFIN | input | Reference input to the on-chip buffer, which must be between 4.75V (or VSS + 14V, whichever is greater) and VCC - 1.4V when an external reference is used. |+| 4 | REFADJ | input | Internal reference trim pin that acts as a gain adjustment input when the internal reference is used. |+| 5 | VREF | power_in | Buffered output from REFIN that drives the DAC circuitry internally and may drive external devices, rated at -2 mA to +2 mA. |+| 6 | ROFFSET | passive | Offsetting resistor connection in the output range configuration network. |+| 7 | AGND | power_in | Analog ground return, to be kept separate from DGND and joined at the system power-entry point. |+| 8 | RFB2 | passive | Feedback resistor 2, used to configure the DAC output range. |+| 9 | RFB1 | passive | Feedback resistor 1, used to configure the DAC output range. |+| 10 | SJ | input | Summing junction of the output amplifier. |+| 11 | VOUT | output | DAC voltage output, configurable for 0V to +10V, ±5V, or ±10V ranges, with a maximum load capacitance of 200pF. |+| 12 | VDD | power_in | Digital power supply, specified from +4.75V to +5.25V (+5.0V typical). |+| 13 | DGND | power_in | Digital ground return for the logic and serial interface, kept separate from AGND. |+| 14 | TEST | passive | Reserved pin that must be connected to DGND. |+| 15 | NC | unconnected | No connection. |+| 16 | RST | input | Active-LOW asynchronous reset that sets the DAC register to mid-scale or min-scale depending on RSTSEL; Schmitt-triggered input. |+| 17 | LDAC | input | DAC register load control, rising-edge triggered, that transfers data from the input register to the DAC register; Schmitt-triggered input. |+| 18 | SDI | input | Serial data input, latched into the input register on the rising edge of SCLK; Schmitt-triggered input. |+| 19 | SDO | tri_state | Serial data output, delayed by 16 SCLK cycles, enabled from high impedance when CS is LOW. |+| 20 | CS | input | Active-LOW chip select that enables the serial shift operation; a rising CS edge should occur only when SCLK is HIGH. |+| 21 | SCLK | input | Serial clock input that clocks data into the input register; Schmitt-triggered input. |+| 22 | RSTSEL | input | Reset select that sets the action of RST: HIGH resets the DAC register to mid-scale, LOW resets it to min-scale. |+| 23 | REFEN | input | Active-LOW enable for the internal +10V reference; HIGH disables the reference and places REFOUT in high impedance. |+| 24 | VSS | power_in | Negative analog power supply, -11.4V to -15.75V for bipolar operation and -4.75V to -15.75V for unipolar operation. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SSOP-24 |+| Category | ADC/DAC/Data Conversion |+| Pins | 24 |++## CAD (KiCad official)++- Symbol: `DAC7731EC`+- Footprint: `Package_SO:SSOP-24_5.3x8.2mm_P0.65mm`+- 3D model: SSOP-24 (KiCad packages3D, STEP)+- 3D model files: `dac7731ec-etched.step` / `dac7731ec-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `dac7731ec.step` / `dac7731ec.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/dac7731) (23 pp, sha256 `031c070247652ea7`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/dac7731ec-datasheet.pdf)
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Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "adc-dac-data conversion",+ "dac7731ec",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "dac7731ec.kicad_sym",+ "dac7731ec.kicad_mod",+ "dac7731ec.glb",+ "dac7731ec.step",+ "dac7731ec.lbr",+ "docs/hero.png",+ "docs/dac7731ec-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "dac7731ec-hero.glb",+ "dac7731ec-hero.overlay.json"+ ],+ "component": {+ "mpn": "DAC7731EC",+ "manufacturer": "Texas Instruments",+ "package": "SSOP-24",+ "pin_count": 24,+ "category": "ADC/DAC/Data Conversion",+ "subcategory": "Digital To Analog Converters (DACs)",+ "datasheet": "https://www.ti.com/cn/lit/gpn/dac7731",+ "parts": {+ "symbol": "dac7731ec.kicad_sym",+ "footprint": "dac7731ec.kicad_mod",+ "model_3d": "dac7731ec-hero.glb",+ "model_3d_plain": "dac7731ec.glb",+ "model_3d_step": "dac7731ec-etched.step",+ "model_3d_step_plain": "dac7731ec.step",+ "lbr": "dac7731ec.lbr"+ },+ "distributor_links": {+ "lcsc": "C2680004",+ "digikey": "DAC7731EC-ND",+ "mouser": "595-DAC7731EC"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T18:47:02Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "DAC7731EC-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "595-DAC7731EC",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "VCC",+ "type": "power_in",+ "description": "Positive analog power supply; the electrical characteristics specify +11.4V to +15.75V."+ },+ {+ "number": "2",+ "name": "REFOUT",+ "type": "output",+ "description": "Internal +10V reference output, enabled when REFEN is LOW and connected to REFIN for internal reference use."+ },+ {+ "number": "3",+ "name": "REFIN",+ "type": "input",+ "description": "Reference input to the on-chip buffer, which must be between 4.75V (or VSS + 14V, whichever is greater) and VCC - 1.4V when an external reference is used."+ },+ {+ "number": "4",+ "name": "REFADJ",+ "type": "input",+ "description": "Internal reference trim pin that acts as a gain adjustment input when the internal reference is used."+ },+ {+ "number": "5",+ "name": "VREF",+ "type": "power_in",+ "description": "Buffered output from REFIN that drives the DAC circuitry internally and may drive external devices, rated at -2 mA to +2 mA."+ },+ {+ "number": "6",+ "name": "ROFFSET",+ "type": "passive",+ "description": "Offsetting resistor connection in the output range configuration network."+ },+ {+ "number": "7",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground return, to be kept separate from DGND and joined at the system power-entry point."+ },+ {+ "number": "8",+ "name": "RFB2",+ "type": "passive",+ "description": "Feedback resistor 2, used to configure the DAC output range."+ },+ {+ "number": "9",+ "name": "RFB1",+ "type": "passive",+ "description": "Feedback resistor 1, used to configure the DAC output range."+ },+ {+ "number": "10",+ "name": "SJ",+ "type": "input",+ "description": "Summing junction of the output amplifier."+ },+ {+ "number": "11",+ "name": "VOUT",+ "type": "output",+ "description": "DAC voltage output, configurable for 0V to +10V, ±5V, or ±10V ranges, with a maximum load capacitance of 200pF."+ },+ {+ "number": "12",+ "name": "VDD",+ "type": "power_in",+ "description": "Digital power supply, specified from +4.75V to +5.25V (+5.0V typical)."+ },+ {+ "number": "13",+ "name": "DGND",+ "type": "power_in",+ "description": "Digital ground return for the logic and serial interface, kept separate from AGND."+ },+ {+ "number": "14",+ "name": "TEST",+ "type": "passive",+ "description": "Reserved pin that must be connected to DGND."+ },+ {+ "number": "15",+ "name": "NC",+ "type": "unconnected",+ "description": "No connection."+ },+ {+ "number": "16",+ "name": "RST",+ "type": "input",+ "description": "Active-LOW asynchronous reset that sets the DAC register to mid-scale or min-scale depending on RSTSEL; Schmitt-triggered input."+ },+ {+ "number": "17",+ "name": "LDAC",+ "type": "input",+ "description": "DAC register load control, rising-edge triggered, that transfers data from the input register to the DAC register; Schmitt-triggered input."+ },+ {+ "number": "18",+ "name": "SDI",+ "type": "input",+ "description": "Serial data input, latched into the input register on the rising edge of SCLK; Schmitt-triggered input."+ },+ {+ "number": "19",+ "name": "SDO",+ "type": "tri_state",+ "description": "Serial data output, delayed by 16 SCLK cycles, enabled from high impedance when CS is LOW."+ },+ {+ "number": "20",+ "name": "CS",+ "type": "input",+ "description": "Active-LOW chip select that enables the serial shift operation; a rising CS edge should occur only when SCLK is HIGH."+ },+ {+ "number": "21",+ "name": "SCLK",+ "type": "input",+ "description": "Serial clock input that clocks data into the input register; Schmitt-triggered input."+ },+ {+ "number": "22",+ "name": "RSTSEL",+ "type": "input",+ "description": "Reset select that sets the action of RST: HIGH resets the DAC register to mid-scale, LOW resets it to min-scale."+ },+ {+ "number": "23",+ "name": "REFEN",+ "type": "input",+ "description": "Active-LOW enable for the internal +10V reference; HIGH disables the reference and places REFOUT in high impedance."+ },+ {+ "number": "24",+ "name": "VSS",+ "type": "power_in",+ "description": "Negative analog power supply, -11.4V to -15.75V for bipolar operation and -4.75V to -15.75V for unipolar operation."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The datasheet gives functional descriptions but no explicit electrical type for these pins; the KiCa; Typed as tri_state because the datasheet states SDO is enabled from high impedance by CS; the ERC ty"+ ],+ "pages_sent": 10,+ "cost_usd": 0.0778,+ "at": "2026-10-08T18:46:15"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/dac7731",+ "pages": 23,+ "sha256": "031c070247652ea7",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 24,+ "described": 24,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "dac7731ec.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 7.8,+ 8.2,+ 2.1+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "77dd0a1fc7e70e9eda1bfde9dde937dc6e391803cff9978790523c850c85a21d",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "dac7731ec-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 7.8,+ 8.2,+ 2.1+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "c70f35cac6f104896d8c71a36097e055d4401056e3c670664da77f58d6c274e8",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}