component
DAC7678SRGER
Public Made by Adomby adom
Texas Instruments Digital To Analog Converters (DAC), QFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownDAC7678SRGER
Texas Instruments · Digital To Analog Converters (DAC) · QFN-24-EP(4x4)
DAC7678SRGER from Texas Instruments, in a QFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | Not internally connected. |
| 2 | AVDD | power_in | Power-supply input, 2.7V to 5.5V. |
| 3 | VOUTA | output | Analog output voltage from DAC A. |
| 4 | VOUTC | output | Analog output voltage from DAC C. |
| 5 | VOUTE | output | Analog output voltage from DAC E. |
| 6 | VOUTG | output | Analog output voltage from DAC G. |
| 7 | NC | unconnected | Not internally connected. |
| 8 | VREFIN/VREFOUT | bidirectional | Positive reference input or reference output of 2.5V, if internal reference used; reference input range is 0 to AVDD. |
| 9 | RSTSEL | input | Reset select pin: RSTSEL high resets device to mid-scale; RSTSEL low resets device to zero-scale. |
| 10 | ADDR1 | input | Three-state address input 1, used with ADDR0 to select the I2C address of the device. |
| 11 | ADDR0 | input | Three-state address input 0, used with ADDR1 to select the I2C address of the device. |
| 12 | CLR | input | Asynchronous clear input; CLR pulse width LOW time t4 is 40 ns minimum in standard mode. |
| 13 | VOUTH | output | Analog output voltage from DAC H. |
| 14 | VOUTF | output | Analog output voltage from DAC F. |
| 15 | VOUTD | output | Analog output voltage from DAC D. |
| 16 | VOUTB | output | Analog output voltage from DAC B. |
| 17 | GND | power_in | Ground reference point for all circuitry on the device. |
| 18 | NC | unconnected | Not internally connected. |
| 19 | SDA | bidirectional | Serial data input/output; a bidirectional open-drain data line that should be connected to the supply voltage with an external pull-up resistor. |
| 20 | SCL | input | Serial clock input; data can be transferred at rates up to 3.4MHz, and it is a Schmitt-trigger logic input. |
| 21 | TWOC | input | Twos complement select: if pulled high, the DAC registers use twos complement format; if pulled low, they use straight binary format. |
| 22 | LDAC | input | Load DACs input, which controls updating of the DAC registers (asynchronous or synchronous LDAC update modes). |
| 23 | NC | unconnected | Not internally connected. |
| 24 | NC | unconnected | Not internally connected. |
| 25 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | QFN-24-EP(4x4) |
| Category | Data Acquisition |
| Pins | 25 |
CAD (KiCad official)
- Symbol:
DAC7678SRGER - Footprint:
Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm - 3D model: QFN-24-EP(4x4) (KiCad packages3D, STEP)
- 3D model files:
dac7678srger-etched.step/dac7678srger-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dac7678srger.step/dac7678srger.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (57 pp, sha256
b7f5320e70b81cc8, retrieved 2026-10-12, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).