component
DAC7678SPWR
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Texas Instruments Digital To Analog Converters (DAC), TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+52@@ -0,0 +1,52 @@+# DAC7678SPWR++**Texas Instruments** · Digital To Analog Converters (DAC) · TSSOP-16++DAC7678SPWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | LDAC | input | Load DACs pin for synchronous/asynchronous update of DAC output registers using falling edge trigger; active-low control input. |+| 2 | ADDR0 | input | Three-state address input 0 for I2C slave address selection; connect to AVDD, GND, or leave floating. |+| 3 | AVDD | power_in | Power-supply input with operating range 2.7V to 5.5V for analog and digital circuits. |+| 4 | VOUTA | output | Analog output voltage from DAC channel A with rail-to-rail output range 0V to AVDD. |+| 5 | VOUTC | output | Analog output voltage from DAC channel C with rail-to-rail output range 0V to AVDD. |+| 6 | VOUTE | output | Analog output voltage from DAC channel E with rail-to-rail output range 0V to AVDD. |+| 7 | VOUTG | output | Analog output voltage from DAC channel G with rail-to-rail output range 0V to AVDD. |+| 8 | VREFIN/VREFOUT | bidirectional | Positive reference input (0V to AVDD) for external reference mode, or 2.5V internal reference output (±5mV initial accuracy) when internal reference enabled; requires 100nF bypass capacitor. |+| 9 | CLR | input | Asynchronous clear input (active low, falling edge triggered) to reset all DAC registers and buffers to programmed clear code value. |+| 10 | VOUTH | output | Analog output voltage from DAC channel H with rail-to-rail output range 0V to AVDD. |+| 11 | VOUTF | output | Analog output voltage from DAC channel F with rail-to-rail output range 0V to AVDD. |+| 12 | VOUTD | output | Analog output voltage from DAC channel D with rail-to-rail output range 0V to AVDD. |+| 13 | VOUTB | output | Analog output voltage from DAC channel B with rail-to-rail output range 0V to AVDD. |+| 14 | GND | power_in | Ground reference point and return path for all analog and digital circuitry on the device. |+| 15 | SDA | bidirectional | Serial data input/output for I2C-compatible 2-wire interface; open-drain bidirectional line requiring external pull-up resistor (1kΩ to 10kΩ typical) to AVDD. |+| 16 | SCL | input | Serial clock input for I2C-compatible 2-wire interface supporting data rates up to 3.4MHz; Schmitt-trigger logic input. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | TSSOP-16 |+| Category | Data Acquisition |+| Pins | 16 |++## CAD (KiCad official)++- Symbol: `DAC7678SPWR`+- Footprint: `Package_SO:TSSOP-16_4.4x5mm_P0.65mm`+- 3D model: TSSOP-16 (KiCad packages3D, STEP)+- 3D model files: `dac7678spwr-etched.step` / `dac7678spwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `dac7678spwr.step` / `dac7678spwr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/dac7678) (57 pp, sha256 `b7f5320e70b81cc8`, retrieved 2026-09-24, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/dac7678spwr-datasheet.pdf)
page.jsonadded+189@@ -0,0 +1,189 @@+{+ "slug": "dac7678spwr",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Digital To Analog Converters (DAC), TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "data acquisition",+ "dac7678spwr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "dac7678spwr.kicad_sym",+ "dac7678spwr.kicad_mod",+ "dac7678spwr.glb",+ "dac7678spwr.step",+ "dac7678spwr.lbr",+ "docs/hero.png",+ "docs/dac7678spwr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "DAC7678SPWR",+ "manufacturer": "Texas Instruments",+ "package": "TSSOP-16",+ "pin_count": 16,+ "category": "Data Acquisition",+ "subcategory": "Digital To Analog Converters (DAC)",+ "datasheet": "https://www.ti.com/cn/lit/gpn/dac7678",+ "parts": {+ "symbol": "dac7678spwr.kicad_sym",+ "footprint": "dac7678spwr.kicad_mod",+ "model_3d": "dac7678spwr-etched.glb",+ "model_3d_plain": "dac7678spwr.glb",+ "model_3d_step": "dac7678spwr-etched.step",+ "model_3d_step_plain": "dac7678spwr.step",+ "lbr": "dac7678spwr.lbr"+ },+ "distributor_links": {+ "lcsc": "C2867839"+ },+ "pins": [+ {+ "number": "1",+ "name": "LDAC",+ "type": "input",+ "description": "Load DACs pin for synchronous/asynchronous update of DAC output registers using falling edge trigger; active-low control input."+ },+ {+ "number": "2",+ "name": "ADDR0",+ "type": "input",+ "description": "Three-state address input 0 for I2C slave address selection; connect to AVDD, GND, or leave floating."+ },+ {+ "number": "3",+ "name": "AVDD",+ "type": "power_in",+ "description": "Power-supply input with operating range 2.7V to 5.5V for analog and digital circuits."+ },+ {+ "number": "4",+ "name": "VOUTA",+ "type": "output",+ "description": "Analog output voltage from DAC channel A with rail-to-rail output range 0V to AVDD."+ },+ {+ "number": "5",+ "name": "VOUTC",+ "type": "output",+ "description": "Analog output voltage from DAC channel C with rail-to-rail output range 0V to AVDD."+ },+ {+ "number": "6",+ "name": "VOUTE",+ "type": "output",+ "description": "Analog output voltage from DAC channel E with rail-to-rail output range 0V to AVDD."+ },+ {+ "number": "7",+ "name": "VOUTG",+ "type": "output",+ "description": "Analog output voltage from DAC channel G with rail-to-rail output range 0V to AVDD."+ },+ {+ "number": "8",+ "name": "VREFIN/VREFOUT",+ "type": "bidirectional",+ "description": "Positive reference input (0V to AVDD) for external reference mode, or 2.5V internal reference output (±5mV initial accuracy) when internal reference enabled; requires 100nF bypass capacitor."+ },+ {+ "number": "9",+ "name": "CLR",+ "type": "input",+ "description": "Asynchronous clear input (active low, falling edge triggered) to reset all DAC registers and buffers to programmed clear code value."+ },+ {+ "number": "10",+ "name": "VOUTH",+ "type": "output",+ "description": "Analog output voltage from DAC channel H with rail-to-rail output range 0V to AVDD."+ },+ {+ "number": "11",+ "name": "VOUTF",+ "type": "output",+ "description": "Analog output voltage from DAC channel F with rail-to-rail output range 0V to AVDD."+ },+ {+ "number": "12",+ "name": "VOUTD",+ "type": "output",+ "description": "Analog output voltage from DAC channel D with rail-to-rail output range 0V to AVDD."+ },+ {+ "number": "13",+ "name": "VOUTB",+ "type": "output",+ "description": "Analog output voltage from DAC channel B with rail-to-rail output range 0V to AVDD."+ },+ {+ "number": "14",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference point and return path for all analog and digital circuitry on the device."+ },+ {+ "number": "15",+ "name": "SDA",+ "type": "bidirectional",+ "description": "Serial data input/output for I2C-compatible 2-wire interface; open-drain bidirectional line requiring external pull-up resistor (1kΩ to 10kΩ typical) to AVDD."+ },+ {+ "number": "16",+ "name": "SCL",+ "type": "input",+ "description": "Serial clock input for I2C-compatible 2-wire interface supporting data rates up to 3.4MHz; Schmitt-trigger logic input."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.2",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.2",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [],+ "pages_sent": 57,+ "cost_usd": 0.5733,+ "at": "2026-09-24T02:10:07"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/dac7678",+ "pages": 57,+ "sha256": "b7f5320e70b81cc8",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 16,+ "described": 16,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}