component
DAC7678SPWR
Public Made by Adomby adom
Texas Instruments Digital To Analog Converters (DAC), TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownDAC7678SPWR
Texas Instruments · Digital To Analog Converters (DAC) · TSSOP-16
DAC7678SPWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | LDAC | input | Load DACs pin for synchronous/asynchronous update of DAC output registers using falling edge trigger; active-low control input. |
| 2 | ADDR0 | input | Three-state address input 0 for I2C slave address selection; connect to AVDD, GND, or leave floating. |
| 3 | AVDD | power_in | Power-supply input with operating range 2.7V to 5.5V for analog and digital circuits. |
| 4 | VOUTA | output | Analog output voltage from DAC channel A with rail-to-rail output range 0V to AVDD. |
| 5 | VOUTC | output | Analog output voltage from DAC channel C with rail-to-rail output range 0V to AVDD. |
| 6 | VOUTE | output | Analog output voltage from DAC channel E with rail-to-rail output range 0V to AVDD. |
| 7 | VOUTG | output | Analog output voltage from DAC channel G with rail-to-rail output range 0V to AVDD. |
| 8 | VREFIN/VREFOUT | bidirectional | Positive reference input (0V to AVDD) for external reference mode, or 2.5V internal reference output (±5mV initial accuracy) when internal reference enabled; requires 100nF bypass capacitor. |
| 9 | CLR | input | Asynchronous clear input (active low, falling edge triggered) to reset all DAC registers and buffers to programmed clear code value. |
| 10 | VOUTH | output | Analog output voltage from DAC channel H with rail-to-rail output range 0V to AVDD. |
| 11 | VOUTF | output | Analog output voltage from DAC channel F with rail-to-rail output range 0V to AVDD. |
| 12 | VOUTD | output | Analog output voltage from DAC channel D with rail-to-rail output range 0V to AVDD. |
| 13 | VOUTB | output | Analog output voltage from DAC channel B with rail-to-rail output range 0V to AVDD. |
| 14 | GND | power_in | Ground reference point and return path for all analog and digital circuitry on the device. |
| 15 | SDA | bidirectional | Serial data input/output for I2C-compatible 2-wire interface; open-drain bidirectional line requiring external pull-up resistor (1kΩ to 10kΩ typical) to AVDD. |
| 16 | SCL | input | Serial clock input for I2C-compatible 2-wire interface supporting data rates up to 3.4MHz; Schmitt-trigger logic input. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-16 |
| Category | Data Acquisition |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
DAC7678SPWR - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files:
dac7678spwr-etched.step/dac7678spwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dac7678spwr.step/dac7678spwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (57 pp, sha256
b7f5320e70b81cc8, retrieved 2026-09-24, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).