main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 14d ago
viewers dac7611ub: viewers · Ray 14d ago
dac7611ub-etched.glb dac7611ub: factory component page (tier=lcsc) · Ray 14d ago
dac7611ub-etched.step dac7611ub: factory component page (tier=lcsc) · Ray 14d ago
dac7611ub-hero.glb dac7611ub: hero GLB from the etched model (keeps the MPN mark) · Ray 14d ago
dac7611ub-hero.overlay.json Publish 0.1.0 · Ray 14d ago
dac7611ub.glb Publish 0.1.0 · Ray 14d ago
dac7611ub.kicad_mod Publish 0.1.0 · Ray 14d ago
dac7611ub.kicad_sym Publish 0.1.0 · Ray 14d ago
dac7611ub.lbr Publish 0.1.0 · Ray 14d ago
dac7611ub.step Publish 0.1.0 · Ray 14d ago
package.json Publish 0.1.0 · Ray 14d ago
page.json Set visibility: public · Ray 14d ago
README.md Publish 0.1.0 · Ray 14d ago

DAC7611UB

Texas Instruments · Digital To Analog Converters (DAC) · SOIC-8

DAC7611UB from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD power_in Power supply input, guaranteed for +4.75V to +5.25V (nominal +5V), with absolute maximum VDD to GND of -0.3V to 6V.
2 CS input Active-LOW chip select that enables serial communication when multiple serial devices share the bus; CS and CLK are interchangeable per the logic truth table.
3 CLK input Synchronous serial clock for the serial data input, with minimum clock width HIGH and LOW of 30 ns each.
4 SDI input Serial data input, clocked into the internal serial shift register on the rising edge of CLK, with data setup of 15 ns and hold of 15 ns minimum.
5 LD input Load strobe that transfers the shift register into the DAC register on a HIGH-to-LOW transition; the DAC register is transparent while LD is LOW, so LD should be returned HIGH before shifting new serial data.
6 CLR input Asynchronous active-LOW clear that sets the DAC register to 000H and VOUT to 0V while held LOW.
7 GND power_in Ground reference for the device and the internal bandgap reference; all digital and analog return currents flow through this single pin.
8 VOUT output Voltage output with a fixed range of approximately 0V to 4.095V at 1mV/LSB, maintained by the internal reference over time, temperature and supply variations.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Data Acquisition
Pins 8

CAD (KiCad official)

  • Symbol: DAC7611UB
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: dac7611ub-etched.step / dac7611ub-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dac7611ub.step / dac7611ub.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (18 pp, sha256 a4d0d2219944b0e9, retrieved 2026-10-11, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF