# DAC7578SPWR

**Texas Instruments** · Digital To Analog Converters (DAC) · TSSOP-16

DAC7578SPWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | LDAC | input | Negative-edge triggered asynchronous load input for updating selected DAC outputs with latched data |
| 2 | ADDR0 | input | 3-state address input for I2C device addressing (connect to AVDD, GND, or leave floating) |
| 3 | AVDD | power_in | Analog power supply input, 2.7V to 5.5V |
| 4 | VOUTA | output | Analog output voltage from DAC A, 0V to AVDD, 0.75V/μs slew rate, 7μs settling time unloaded |
| 5 | VOUTC | output | Analog output voltage from DAC C, 0V to AVDD, 0.75V/μs slew rate, 7μs settling time unloaded |
| 6 | VOUTE | output | Analog output voltage from DAC E, 0V to AVDD, 0.75V/μs slew rate, 7μs settling time unloaded |
| 7 | VOUTG | output | Analog output voltage from DAC G, 0V to AVDD, 0.75V/μs slew rate, 7μs settling time unloaded |
| 8 | VREFIN | input | Positive external reference input, 0V to 5V for scaling DAC output range with typical external reference current 60µA |
| 9 | CLR | input | Asynchronous clear input, falling-edge triggered with 40ns minimum pulse width to clear all DAC registers to configured clear code |
| 10 | VOUTH | output | Analog output voltage from DAC H, 0V to AVDD, 0.75V/μs slew rate, 7μs settling time unloaded |
| 11 | VOUTF | output | Analog output voltage from DAC F, 0V to AVDD, 0.75V/μs slew rate, 7μs settling time unloaded |
| 12 | VOUTD | output | Analog output voltage from DAC D, 0V to AVDD, 0.75V/μs slew rate, 7μs settling time unloaded |
| 13 | VOUTB | output | Analog output voltage from DAC B, 0V to AVDD, 0.75V/μs slew rate, 7μs settling time unloaded |
| 14 | GND | power_in | Ground reference point and return path for all analog and digital circuitry on the device |
| 15 | SDA | bidirectional | I2C bidirectional open-drain serial data line with external pull-up resistor (1kΩ to 10kΩ recommended), supports up to 3.4MHz clock rate |
| 16 | SCL | input | I2C serial clock input with Schmitt-trigger logic, supports data transfer rates up to 3.4MHz |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-16 |
| Category | Data Acquisition |
| Pins | 16 |

## CAD (KiCad official)

- Symbol: `DAC7578SPWR`
- Footprint: `Package_SO:TSSOP-16_4.4x5mm_P0.65mm`
- 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files: `dac7578spwr-etched.step` / `dac7578spwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `dac7578spwr.step` / `dac7578spwr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/dac7578) (60 pp, sha256 `384236e44db678a7`, retrieved 2026-09-23, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/dac7578spwr-datasheet.pdf)