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DAC7565ICPW

Public Made by Adom

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Texas Instruments Digital To Analog Converters (DAC), TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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DAC7565ICPW

Texas Instruments · Digital To Analog Converters (DAC) · TSSOP-16

DAC7565ICPW from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VOUTA output Analog output voltage from DAC A, driven by the on-chip rail-to-rail output buffer amplifier with an output range of 0 to VREF V.
2 VOUTB output Analog output voltage from DAC B, driven by the on-chip rail-to-rail output buffer amplifier with an output range of 0 to VREF V.
3 VREFH/VREFOUT bidirectional Positive reference input, or the 2.5V reference output when the internal reference is used; the reference input range is 0 to AVDD V.
4 AVDD power_in Power-supply input for the analog circuitry, 2.7V to 5.5V.
5 VREFL input Negative reference input; the reference input range is 0 to AVDD/2 V when VREFL is below VREFH.
6 GND power_in Ground reference point for all circuitry on the part.
7 VOUTC output Analog output voltage from DAC C, driven by the on-chip rail-to-rail output buffer amplifier with an output range of 0 to VREF V.
8 VOUTD output Analog output voltage from DAC D, driven by the on-chip rail-to-rail output buffer amplifier with an output range of 0 to VREF V.
9 SYNC input Level-triggered active-low frame sync that enables the input shift register; the DAC output updates after the 24th clock, and a SYNC rising edge before the 24th clock aborts the write sequence. Schmitt-trigger input.
10 SCLK input Serial clock input supporting data transfer rates up to 50MHz; Schmitt-trigger input.
11 DIN input Serial data input clocked into the 24-bit input shift register on each falling SCLK edge; Schmitt-trigger input.
12 IOVDD power_in Digital input-output power supply, 1.8V to 5.5V.
13 RST input Asynchronous active-low reset that sets all DAC channels to zero-scale (RSTSEL = 0) or mid-scale (RSTSEL = 1).
14 RSTSEL input Reset select: when low the input coding is binary, and when high the input coding is two's complement.
15 ENABLE input Active-low enable that connects the SPI interface to the serial port.
16 LDAC input Load DACs input, rising-edge triggered, that loads all DAC registers.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-16
Category Data Acquisition
Pins 16

CAD (KiCad official)

  • Symbol: DAC7565ICPW
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: dac7565icpw-etched.step / dac7565icpw-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dac7565icpw.step / dac7565icpw.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (51 pp, sha256 676bd6014edb5cf1, retrieved 2026-10-10, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF