component
DAC7562TDGST
Public Made by Adomby adom
Texas Instruments Digital To Analog Converters (DACs), VSSOP-10-0.5mm. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
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"description": "Texas Instruments Digital To Analog Converters (DACs), VSSOP-10-0.5mm. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
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"component": {
"mpn": "DAC7562TDGST",
"manufacturer": "Texas Instruments",
"package": "VSSOP-10-0.5mm",
"pin_count": 10,
"category": "ADC/DAC/Data Conversion",
"subcategory": "Digital To Analog Converters (DACs)",
"datasheet": "https://www.ti.com/cn/lit/gpn/dac8162t",
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"lbr": "dac7562tdgst.lbr"
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"distributor_links": {
"lcsc": "C1016154",
"digikey": "296-DAC7562TDGSTTR-ND",
"mouser": "595-DAC7562TDGST"
},
"distributor_check": {
"checked_at": "2026-10-08T19:55:17Z",
"source": "Component Ocean /api/assign-pns",
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"status": "found"
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"pins": [
{
"number": "1",
"name": "VOUTA",
"type": "output",
"description": "Analog output voltage from DAC-A."
},
{
"number": "2",
"name": "VOUTB",
"type": "output",
"description": "Analog output voltage from DAC-B."
},
{
"number": "3",
"name": "GND",
"type": "power_in",
"description": "Ground reference point for all circuitry on the device."
},
{
"number": "4",
"name": "LDAC",
"type": "input",
"description": "In synchronous mode it must be tied to GND permanently or held low before sending commands; in asynchronous mode a negative-edge trigger simultaneously updates the DAC output registers from the data buffers."
},
{
"number": "5",
"name": "CLR",
"type": "input",
"description": "Falling-edge-sensitive asynchronous clear input that loads zero-scale (DAC7562T) into all input and DAC registers, and the device exits clear mode on the 24th falling edge of the next write."
},
{
"number": "6",
"name": "SYNC",
"type": "input",
"description": "Active-low frame sync input (Schmitt-trigger); DAC output updates after the 24th SCLK falling edge, and a SYNC rising edge before the 23rd clock edge aborts the write sequence."
},
{
"number": "7",
"name": "SCLK",
"type": "input",
"description": "Serial clock input (Schmitt-trigger) with data transfer rates up to 50 MHz."
},
{
"number": "8",
"name": "DIN",
"type": "input",
"description": "Serial data input (Schmitt-trigger); data are clocked into the 24-bit input shift register on each falling SCLK edge."
},
{
"number": "9",
"name": "AVDD",
"type": "power_in",
"description": "Power-supply input, 2.7 V to 5.5 V."
},
{
"number": "10",
"name": "VREFIN/VREFOUT",
"type": "bidirectional",
"description": "Bidirectional voltage reference pin; provides a 2.5-V output when the internal reference is used, otherwise accepts an external reference input."
}
],
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"primary_model": "claude-haiku-5-5",
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"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The DGS (VSSOP-10) pinout was taken from the Pin Functions table on page 4, since the pin drawing te; Description for VREFIN/VREFOUT states the 2.5-V output only when the internal reference is used. The"
],
"pages_sent": 13,
"cost_usd": 0.0864,
"at": "2026-10-08T19:54:58"
},
"datasheet": {
"url": "https://www.ti.com/cn/lit/gpn/dac8162t",
"pages": 63,
"sha256": "c924f9150c60d73e",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 10,
"described": 10,
"cites_pages": true,
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}