main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 1d ago
viewers dac7552irgtr: viewers · Ray 1d ago
dac7552irgtr-etched.glb dac7552irgtr: factory component page (tier=lcsc) · Ray 1d ago
dac7552irgtr-etched.step dac7552irgtr: factory component page (tier=lcsc) · Ray 1d ago
dac7552irgtr-hero.glb dac7552irgtr: hero GLB from the etched model (keeps the MPN mark) · Ray 7h ago
dac7552irgtr-hero.overlay.json Publish 0.1.0 · Ray 1d ago
dac7552irgtr.glb Publish 0.1.0 · Ray 1d ago
dac7552irgtr.kicad_mod Publish 0.1.0 · Ray 1d ago
dac7552irgtr.kicad_sym Publish 0.1.0 · Ray 1d ago
dac7552irgtr.lbr Publish 0.1.0 · Ray 1d ago
dac7552irgtr.step Publish 0.1.0 · Ray 1d ago
package.json Publish 0.1.0 · Ray 1d ago
page.json Set visibility: public · Ray 1d ago
README.md Initial commit: component/dac7552irgtr · Ray 1d ago

DAC7552IRGTR

Texas Instruments · Digital To Analog Converters (DACs) · TQFN-16-EP(3x3)

DAC7552IRGTR from Texas Instruments, in a TQFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VOUTA output Analog voltage output from DAC A; the output swings rail-to-rail over 0 V to VREF.
2 VDD power_in Analog supply input, 2.7 V to 5.5 V.
3 GND power_in Ground; the thermal pad should be connected to GND.
4 VOUTB output Analog voltage output from DAC B; the output swings rail-to-rail over 0 V to VREF.
5 VFBB input DAC B amplifier sense input; for voltage output operation, connect to VOUTB externally.
6 VREFB input Positive reference voltage input for DAC B; input range 0 V to VDD.
7 PD input Power-down control input; the datasheet gives no polarity or threshold for this pin in the pin table.
8 DCEN input Daisy-chain enable input.
9 SDO output Serial data output for daisy-chaining; SDO is valid 10 ns max after the SCLK falling edge at VDD = 2.7 V to 3.6 V (t9).
10 IOVDD power_in I/O voltage supply input; for single-supply operation, connect to VDD externally.
11 SYNC input Frame synchronization input; the falling edge of SYNC indicates the start of a serial data frame shifted into the DAC7552.
12 SCLK input Serial clock input, up to 50 MHz.
13 SDIN input Serial data input.
14 CLR input Asynchronous clear input; when low, the DAC registers are set to 000H and the output voltage to 0 V.
15 VREFA input Positive reference voltage input for DAC A; input range 0 V to VDD.
16 VFBA input DAC A amplifier sense input; for voltage output operation, connect to VOUTA externally.
17 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TQFN-16-EP(3x3)
Category ADC/DAC/Data Conversion
Pins 17

CAD (KiCad official)

  • Symbol: DAC7552IRGTR
  • Footprint: Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm
  • 3D model: TQFN-16-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: dac7552irgtr-etched.step / dac7552irgtr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dac7552irgtr.step / dac7552irgtr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (27 pp, sha256 f62e540c826e1ba2, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF