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DAC7552IRGTR
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Texas Instruments Digital To Analog Converters (DACs), TQFN-16-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+53@@ -0,0 +1,53 @@+# DAC7552IRGTR++**Texas Instruments** · Digital To Analog Converters (DACs) · TQFN-16-EP(3x3)++DAC7552IRGTR from Texas Instruments, in a TQFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VOUTA | output | Analog voltage output from DAC A; the output swings rail-to-rail over 0 V to VREF. |+| 2 | VDD | power_in | Analog supply input, 2.7 V to 5.5 V. |+| 3 | GND | power_in | Ground; the thermal pad should be connected to GND. |+| 4 | VOUTB | output | Analog voltage output from DAC B; the output swings rail-to-rail over 0 V to VREF. |+| 5 | VFBB | input | DAC B amplifier sense input; for voltage output operation, connect to VOUTB externally. |+| 6 | VREFB | input | Positive reference voltage input for DAC B; input range 0 V to VDD. |+| 7 | PD | input | Power-down control input; the datasheet gives no polarity or threshold for this pin in the pin table. |+| 8 | DCEN | input | Daisy-chain enable input. |+| 9 | SDO | output | Serial data output for daisy-chaining; SDO is valid 10 ns max after the SCLK falling edge at VDD = 2.7 V to 3.6 V (t9). |+| 10 | IOVDD | power_in | I/O voltage supply input; for single-supply operation, connect to VDD externally. |+| 11 | SYNC | input | Frame synchronization input; the falling edge of SYNC indicates the start of a serial data frame shifted into the DAC7552. |+| 12 | SCLK | input | Serial clock input, up to 50 MHz. |+| 13 | SDIN | input | Serial data input. |+| 14 | CLR | input | Asynchronous clear input; when low, the DAC registers are set to 000H and the output voltage to 0 V. |+| 15 | VREFA | input | Positive reference voltage input for DAC A; input range 0 V to VDD. |+| 16 | VFBA | input | DAC A amplifier sense input; for voltage output operation, connect to VOUTA externally. |+| 17 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | TQFN-16-EP(3x3) |+| Category | ADC/DAC/Data Conversion |+| Pins | 17 |++## CAD (KiCad official)++- Symbol: `DAC7552IRGTR`+- Footprint: `Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm`+- 3D model: TQFN-16-EP(3x3) (KiCad packages3D, STEP)+- 3D model files: `dac7552irgtr-etched.step` / `dac7552irgtr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `dac7552irgtr.step` / `dac7552irgtr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/dac7552) (27 pp, sha256 `f62e540c826e1ba2`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/dac7552irgtr-datasheet.pdf)
page.jsonadded+254@@ -0,0 +1,254 @@+{+ "slug": "dac7552irgtr",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Digital To Analog Converters (DACs), TQFN-16-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "adc-dac-data conversion",+ "dac7552irgtr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "dac7552irgtr.kicad_sym",+ "dac7552irgtr.kicad_mod",+ "dac7552irgtr.glb",+ "dac7552irgtr.step",+ "dac7552irgtr.lbr",+ "docs/hero.png",+ "docs/dac7552irgtr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "dac7552irgtr-hero.glb",+ "dac7552irgtr-hero.overlay.json"+ ],+ "component": {+ "mpn": "DAC7552IRGTR",+ "manufacturer": "Texas Instruments",+ "package": "TQFN-16-EP(3x3)",+ "pin_count": 17,+ "category": "ADC/DAC/Data Conversion",+ "subcategory": "Digital To Analog Converters (DACs)",+ "datasheet": "https://www.ti.com/cn/lit/gpn/dac7552",+ "parts": {+ "symbol": "dac7552irgtr.kicad_sym",+ "footprint": "dac7552irgtr.kicad_mod",+ "model_3d": "dac7552irgtr-hero.glb",+ "model_3d_plain": "dac7552irgtr.glb",+ "model_3d_step": "dac7552irgtr-etched.step",+ "model_3d_step_plain": "dac7552irgtr.step",+ "lbr": "dac7552irgtr.lbr"+ },+ "distributor_links": {+ "lcsc": "C545238",+ "digikey": "296-18222-2-ND",+ "mouser": "595-DAC7552IRGTR"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T01:13:46Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-18222-2-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "595-DAC7552IRGTR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "VOUTA",+ "type": "output",+ "description": "Analog voltage output from DAC A; the output swings rail-to-rail over 0 V to VREF."+ },+ {+ "number": "2",+ "name": "VDD",+ "type": "power_in",+ "description": "Analog supply input, 2.7 V to 5.5 V."+ },+ {+ "number": "3",+ "name": "GND",+ "type": "power_in",+ "description": "Ground; the thermal pad should be connected to GND."+ },+ {+ "number": "4",+ "name": "VOUTB",+ "type": "output",+ "description": "Analog voltage output from DAC B; the output swings rail-to-rail over 0 V to VREF."+ },+ {+ "number": "5",+ "name": "VFBB",+ "type": "input",+ "description": "DAC B amplifier sense input; for voltage output operation, connect to VOUTB externally."+ },+ {+ "number": "6",+ "name": "VREFB",+ "type": "input",+ "description": "Positive reference voltage input for DAC B; input range 0 V to VDD."+ },+ {+ "number": "7",+ "name": "PD",+ "type": "input",+ "description": "Power-down control input; the datasheet gives no polarity or threshold for this pin in the pin table."+ },+ {+ "number": "8",+ "name": "DCEN",+ "type": "input",+ "description": "Daisy-chain enable input."+ },+ {+ "number": "9",+ "name": "SDO",+ "type": "output",+ "description": "Serial data output for daisy-chaining; SDO is valid 10 ns max after the SCLK falling edge at VDD = 2.7 V to 3.6 V (t9)."+ },+ {+ "number": "10",+ "name": "IOVDD",+ "type": "power_in",+ "description": "I/O voltage supply input; for single-supply operation, connect to VDD externally."+ },+ {+ "number": "11",+ "name": "SYNC",+ "type": "input",+ "description": "Frame synchronization input; the falling edge of SYNC indicates the start of a serial data frame shifted into the DAC7552."+ },+ {+ "number": "12",+ "name": "SCLK",+ "type": "input",+ "description": "Serial clock input, up to 50 MHz."+ },+ {+ "number": "13",+ "name": "SDIN",+ "type": "input",+ "description": "Serial data input."+ },+ {+ "number": "14",+ "name": "CLR",+ "type": "input",+ "description": "Asynchronous clear input; when low, the DAC registers are set to 000H and the output voltage to 0 V."+ },+ {+ "number": "15",+ "name": "VREFA",+ "type": "input",+ "description": "Positive reference voltage input for DAC A; input range 0 V to VDD."+ },+ {+ "number": "16",+ "name": "VFBA",+ "type": "input",+ "description": "DAC A amplifier sense input; for voltage output operation, connect to VOUTA externally."+ },+ {+ "number": "17",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The RGT (VQFN-16) package has an exposed thermal pad. The pin table gives it no number, so it is not; Pin 7 (PD) is described only as 'Power-down' in the pin table. The polarity (active-high or active-l; Pin 9 (SDO) description combines the pin-table function with the t9 timing value from page 4 (10 ns ",+ "exposed pad 17 added from the footprint"+ ],+ "pages_sent": 9,+ "cost_usd": 0.061,+ "at": "2026-10-08T01:13:29"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/dac7552",+ "pages": 27,+ "sha256": "f62e540c826e1ba2",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 17,+ "described": 17,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "dac7552irgtr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 3,+ 3,+ 0.785+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "3eb81ffac423a66cdcfead8efe56401da171edaf1f2257049aad7b2d3900f6c8",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "dac7552irgtr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 3,+ 3,+ 0.785+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "de4d39b3244c325262c3b3170432d3958439f2dcf1e340629aed0ab9eb5ff8a9",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}